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Watch this video to see how an FPGA-based platform easily performs complex image processing to support WDR CMOS image sensors. You'll see a demo using the Aptina MT9M033 720p WDR CMOS image sensor, image processing intellectual property (IP) from Apical Ltd., and the Cyclone® III FPGA Development Kit. Learn how easily you can incorporate WDR CMOS image sensors into your camera designs today! |
HD WDR Video Surveillance Camera Reference Design The Altera® video surveillance camera reference design is based on the Cyclone® III Development Kit. At the heart of the EP3C120 FPGA in this kit is an advanced wide dynamic range (WDR) CMOS sensor processing design from Apical, Ltd., which includes: The design from Apical includes:
Hardware for the Reference Design Includes Aptina's MT9M033 720p WDR CMOS Image Sensor, the Cyclone III FPGA Development Kit, and Bitec's DVI HSMC Daughtercard. This reference design demonstrates the advanced sensor processing required to transform the vast bandwidth of today's WDR CMOS image sensors into a standard 8-bit digital video stream understood by today's ASSP and DSP-based encoder devices. With the Bitec DVI HSMC card, the sensor's video stream can be output to a 720-line progressive scanned monitor with a DVI input of 60 frames per second. HD WDR Video Surveillance IP Camera Reference Design—NEW! Available now from Altera is the 2nd generation video surveillance reference design—now incorporating a full HD WDR IP camera on a single FPGA. Using the same hardware platform as above, the features of this new design are:
With this 2nd generation reference design, 720p30 compressed H.264 video is streamed from the Cyclone III FPGA Development Kit via the on-board Ethernet port to any PC running the open-source VLC Media Player. The attached PC can also configure the camera over the same Ethernet connection via a web-server running on the development kit. |
