Introducing HardCopy II ASICs

Building on the success of two previous generations of HardCopy^® solutions, Altera introduces 90-nm HardCopy II devices. Seamless migration makes HardCopy II devices drop-in replacements for Stratix^® II FPGA prototypes, reducing development time and the risk of redesign.

Architecture

HardCopy II ASICs are built on a fine-grained architecture of HCells. The Stratix II FPGA prototype design is mapped to the HardCopy II architecture using a library of HCell macros. Each pre-defined, fully verified macro corresponds to a unique Stratix II ALM configuration. This mapping process requires no re-synthesis and is accomplished automatically in Altera's Quartus^® II software.

With HardCopy II devices you can:

• Get the fastest time-to-market with the lowest risk
• Reduce development effort and cost with a seamless migration from FPGA prototypes
• Achieve over 350-MHz performance and more than 50% power reduction as compared to the FPGA prototype
• Design with Quartus II software and your existing EDA tools

Get ASIC Gain Without the Pain