Altera’s Transceiver Portfolio Workshops

Attend Altera’s free, practical workshop to learn the important silicon, board, and system solutions you’ll need to design for high-speed serial links at your desired bit-error rate. Test drive our systems through live signal integrity demonstrations with real silicon and design examples.

Where:
Altera Corporation Headquarters
101 Innovation Drive, Bldg. 3
San Jose, CA 95134
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When:
April 2, 2009

Register today!

Featured technology:
Stratix® IV GX , Stratix IV GT, and Arria® II GX FPGAs and HardCopy® IV ASICs

What to expect
In addition to the live demonstrations with real silicon and design examples, you will also learn about:

• High-speed channel design techniques and guidelines for optimal transceiver signal integrity
• The impact of power delivery networks and decoupling strategies
• System design solutions including power design tradeoffs and transceiver simulation and measurement
• The breakdown of jitter and its impact on your system

Participating partners
Specialists from participating partners along with signal integrity expert, Dr. Eric Bogatin, will guide you through the latest solutions for meeting transceiver design challenges. Participating partners include:

• Agilent Technologies
• Arrow Electronics
• Cadence
• CST
• Linear Technology
• Mentor Graphics
• Octera
• Tektronix

Topics

• Transceiver Architecture
  
• Jitter, Eye Diagram, BER Lecture + Demo
  
• Power Delivery Network (PDN) Lecture + Demo
  
• Power Supply Design & Simplification
  
• PCI Express
  
• Transceiver Board Design Guidelines
  

Register today!

Additional information
Learn more about Altera’s 40-nm devices with transceivers:

• Stratix IV GX and GT FPGAs – High-density, low-power devices with up to 11.3-Gbps transceivers
• Arria II GX FPGAs – Low-power, cost-optimized devices with up to 3.75 Gbps-transceivers
• HardCopy IV GX ASICs – Low risk, low total cost and fast-time-to-market solutions with 6.5+ Gbps transceivers

Visit the Altera Board Design Resource Center, a comprehensive repository of signal integrity and board design guidelines and information.