Device Comparison

When picking a PLD the following resources need to be considered:

• Number of programmable logic elements (basic building block of programmable logic)
• Number of RAM bits
• Number of PLLs
• Number of I/Os
• I/O standards supported: SSTL, GTL, HSTL, LVDS, LVCMOS, etc.

Choose the right device for your application: In most cases, the number of programmable logic elements is the limiting factor. Use the table below to pick similar-sized devices from Altera and Xilinx, based on logic elements.

	Xilinx	Altera
Device	XC2S15 XC2S30 XC2S50 XC2S100 XC2S150 XC2S200 XCV50E XCV100E XCV200E XCV300E XCV400E XCV600E XCV1000E XCV1600E XCV2000E XCV2600E XCV3200E XCV50 XCV100 XCV150 XCV200 XCV300 XCV400 XCV600 XCV800 XCV1000
Logic Elements - Altera Method
Logic Cells - Xilinx Method
RAM Blocks
RAM Bits

Note:

• Altera's and Xilinx's basic building block is a 4-input look-up table (LUT), a flip-flop and some additional circuitry that Altera calls a logic element (LE) and Xilinx calls a logic cell (LC).

• The logic cell to logic element ratio is 1.125:1, despite generally similar functionality. Therefore, divide Xilinx's stated LC count by 1.125 to get the equivalent Altera LE count. For a detailed analysis please go to http://www.altera.com/products/devices/apex/features/apx-compdensity.html

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