For Release: September 13, 1999
Altera Announces UTOPIA Level 2 Cores From Newest AMPP Partner, Applied Microelectronics
- Cores Compliant with ATM Forum UTOPIA Level 2, Version 1.0, with a Migration Path to Level 3 Capabilities
- Optimized for FLEX® 10KE PLDs with Speeds Up to 50-MHz
- Fully Parameterized with MegaWizard™ Plug-In and OpenCore™ Evaluation Support
San Jose, Calif., September 13, 1999--Altera Corporation (Nasdaq: ALTR) today announced that a new Altera Megafunction Partners Program (AMPPSM) member, Applied Microelectronics Inc., has developed three UTOPIA (Universal Test and Operation PHY Interface for ATM) cores including a Level 2 Master Receiver, Level 2 Master Transmitter and a Level 2 Slave. The cores are optimized for Altera's industry-leading FLEX® 10KE family of programmable logic devices (PLDs) and parameterized for use with Altera's MegaWizard™ Plug-In Manager and OpenCore™ evaluation support. The cores are ideal interfaces for networking and asynchronous transfer mode (ATM) applications, including ATM switches, network interfaces and xDSL modems. The megafunctions are fully compliant with ATM Forum UTOPIA Level 2, Version 1.0 and provide future migration to advanced UTOPIA
Level 3 functionality.
"We are excited about expanding our partnership with Applied Microelectronics, a member of the Altera Consultant Alliance Program (ACAP®) since 1998," said Luanne Stechert, Altera's AMPP program manager. "Applied Microelectronics has capitalized on its extensive experience in data communications to develop cores that will accelerate design cycles for PLD customers."
UTOPIA Cores Designed for ATM Applications
Applied Microelectronics' UTOPIA Level 2 Master Receiver and Master Transmitter megafunctions are interfaces between a non-proprietary local bus and the PHY layer. Both Level 2 cores handle the polling and selection of the PHY addresses and provide flow control of the data in both octet and cell level.
The UTOPIA Level 2 Slave core is a multi-PHY, multi-clock domain, bi-directional interface between a local bus and the ATM layer. The megafunction works in octet or cell level and incorporates two rate-matching FIFOs, each with a cell depth of four. The UTOPIA Level 2 Slave is composed of a transmitter and receiver that operate independently.
The UTOPIA cores support parameter selection through Altera's MegaWizard Plug-In manager. The UTOPIA Level 2 Master cores have configuration parameters that can be set at compile time or by use of inputs to set core modes. The UTOPIA Level 2 Slave core has configuration parameters that can be set at compile time or upon instantiation. These features provide adaptability and efficient usage of the device's logic gates. As a result, the same core can be used in different applications with different environments and requirements.
"The UTOPIA cores are optimized to run at speeds of up to 50-MHz, and support local bus widths of 8 or 16 bits," said Sean Brogan, director of sales for Applied Microelectronics. "This flexibility allows for easy instantiation into a wide variety of ATM applications, particularly when implemented in Altera PLDs."
Evaluation, Pricing & Availability
Applied Microelectronics' UTOPIA megafunctions are currently available for evaluation via Altera's OpenCore™ capability on Altera's website, or through the Applied Microelectronics website at http://www.appliedmicro.ns.ca. The OpenCore evaluation feature contains simple simulation files and provides designers a restricted license to instantiate, compile and simulate encrypted megafunctions, within the application, to verify size and performance prior to purchasing. Pricing for an encrypted netlist for the three cores is $15,000 U.S. Individually, the UTOPIA Level 2 Master Receiver and Level 2 Master Transmitter are bundled together for $8,000 U.S.; the UTOPIA Level 2 Slave is priced at $8,000 U.S. Both megafunctions include Encrypted Text Design Files, Design Include Files, Design MegaWizard Plug-in Executable and documentation. Source code and simulation files are available by contacting Applied Microelectronics directly.
About AMPP
The Altera Megafunction Partners Program, established in August 1995, was created to bring the advantages of design reuse to users of Altera PLDs. AMPP is an alliance between Altera and developers of IP cores that encourages megafunction development. Altera provides technical information and training to the AMPP partners, who create and support IP cores targeted for Altera programmable logic devices. Currently, there are 30 AMPP partners who offer 100 megafunctions.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands, that other companies will develop products with higher densities than those offered by the Company, and that yields will not be sufficient to support projected pricing. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Applied Microelectronics Inc.
An established leader in the design and development of embedded systems applications, Applied Microelectronics' technology expertise helps clients and partners bring quality products to market quickly and cost effectively. Over the last 18 years, Applied Microelectronics has developed a wide variety of embedded systems incorporating FPGAs, CPLDs, microcontrollers, multi-tasking real-time operating systems, DSP technology and high-performance digital boards. These systems have enabled companies such as AlliedSignal Corporation, Lockheed Martin Canada, General Dynamics, Newbridge Networks, Spar Aerospace, and DY 4 Systems improve their product or service time-to-market.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
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