For Release: September 20, 1999
Altera Ships First PLD in FineLine BGA Package Using Flip-Chip Technology
- Industry Leading Packaging Technology Allows Altera to Produce Advanced Programmable Logic Products Faster
- Enables More Aggressive Die Sizes, Better Performance
San Jose, Calif., September 20, 1999--Altera Corporation (Nasdaq: ALTR) today announced shipment of the APEX™ EP20K400 in a 672-ball FineLine BGA™ package, the first PLD utilizing advanced flip-chip packaging technology. Flip-chip packaging technology allows Altera to bring new PLD products to market faster by simplifying the introduction and production of products in advanced packaging technologies. The flip-chip technology provides greater flexibility in package pin placement, thus enhancing footprint migration from one PLD to another, and leading to greater design flexibility. In addition, flip-chip technology provides advantages in the areas of I/O performance and device characteristics, important requirements for emerging communications applications. According to a recent Dataquest report, current requirements for new communications-oriented packages include up to 650 pins and I/O performance as high as 1.2 GHz.
"Altera's use of flip-chip technology for FineLine BGA packaging represents the first use of this advanced technology in a PLD," said Craig Leclair, Altera director of components marketing. "The many advantages of this technology will allow us to quickly deliver an effective packaging solution ideal for high-performance communications designs."
Flip-chip technology is accomplished by "flipping" the die upside down within a package and distributing an array of pads across the face of the die. These pads are "bumped" by placing a large number of tiny solder balls on the die, an implementation which significantly simplifies the process of package assembly and enables rapid deployment of products in advanced packaging technologies. This also improves high-speed I/O support within the package due to shorter paths from package pin to die, reducing routing delay within the package. Shorter routing allows for better support of I/O standards such as LVDS, which can operate at speeds up to 622 Mbits/second. The combination of flip-chip packaging and BGA technology will result in cost reductions by allowing for a smaller die size to implement a given density and I/O count.
Altera's FineLine BGA packages are a perfect complement to the new flip-chip technology. Utilizing a 1.0-mm ball pitch, FineLine BGA packages can implement more than twice as many pins (balls) in the same area compared to typical (1.27-mm ball pitch) BGA packages. A 672-ball FineLine BGA package consumes the same space as a 256-ball standard BGA package (1.27-mm pitch).
FineLine BGA package offerings have been available since August 1998 and are offered in seven ball counts including 100-ball, 196-ball, 256-ball, 324-ball, 484-ball, 672-ball, and 1020-ball. FineLine BGA packages are now shipping in MAX® 7000A, FLEX® 6000, FLEX 10KA, FLEX 10KE, and APEX 20K families.
In addition to moving up or down a density, Altera's innovative SameFrame™ pin-out allows for same pin-out regardless of ball-count between APEX FineLine BGA packages with different ball counts and body size. With SameFrame pin-out, the layout of balls is such that smaller ball-count packages form a footprint-compatible subset of larger packages. This layout of balls gives designers the ability to migrate from one FineLine BGA package to another without having to perform board re-layout, thus providing a new level of package migration flexibility.
About the EP20K400
The EP20K400 device is fabricated on a 0.25-micron (drawn), six-layer metal SRAM process and features 16,640 logic elements, 104 embedded system blocks, and up to 1664 macrocells and 212,992 bits of on-chip RAM for a combined total of approximately 400,000 gates with a maximum of 1,052,000 system gates. All devices in the APEX family feature Altera's unique MultiCore™ architecture, which combines look-up table logic, product-term logic and embedded memory on-board a single device.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands, that other companies will develop products with higher densities than those offered by the Company, and that yields will not be sufficient to support projected pricing. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
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