Altera Home Page
Literature Licensing
Buy On-Line Download

  Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line  
  About Us   |   Customer Successes   |   Partners   |   Newsroom   |   Investor Relations   |   Environmental   |   Jobs   |   Contact Us  

 About Altera
      Fact Sheet
      Community Relations
      Newsroom Contacts
  
 Press Releases
      Corporate Releases
      Product Releases
      Financial Releases
   Press Releases Archive
          2007
          2006
          2005
          2004
          2003
          2002
          2001
          2000
          1999
          1998
          1997
          1996
  
 Press Library
      Altera in the News
      Event Presentations
      White Papers
      Virtual Press Kits
  

For Release: July 12, 1999

Altera's Quartus 1999.06 Development System Enables Million-Gate PLD Design

  • Industry's Fastest Timing-Driven Compilation
  • Supports Industry's Largest Programmable Logic Device
  • SignalTap Logic Analysis Breaks Verification Bottleneck

San Jose, Calif., July 12, 1999--Altera Corporation (NASDAQ: ALTR) has released Quartus 1999.06, adding support for the new APEX EP20K1000E, the industry's largest programmable logic device, which is composed of 38,400 logic elements, or 1 million useable gates. This latest release of the Quartus software delivers new features that are required to support multi-million gate designs created for Altera's revolutionary APEX programmable logic architecture. Altera's Quartus software provides advanced compilation features, seamless integration with third-party EDA tools, and an advanced verification environment, enabling engineering organizations to efficiently conceive, optimize, and verify multi-million gate designs. On a benchmark suite of over 80 customer designs, ranging from 1,000 to 25,000 logic elements, the average timing driven compilation time was less than 1 hour using 200MHz Pentium-based computers.

"The Quartus development system represents a breakthrough in programmable logic development software," said Erik Cleage, Altera senior vice president of marketing. "Making a complete transition from Altera's MAX+PLUS® II, the industry's most successful development system, Quartus software incorporates new features and capabilities that are crucial to achieving design success in the "system-on-a-programmable-chip"era.

"Altera recognizes that existing development systems will fall short in the realm of million-gate designs. The Quartus software takes advantage of the latest technological advances available to provide design engineers with a totally new set of capabilities," said Tim Southgate, Altera vice president of software engineering. "By starting from the ground up, we were able to employ the latest advances in object-oriented databases, programming tools, and the World Wide Web, integrating them all together into a development platform able to handle system-level integration on chip."

Advanced nSTEP Compiler Full of Innovations

At the heart of the Quartus software is the nSTEP compiler, incorporating revolutionary innovations to reduce design cycles. The nSTEP compiler includes CoreSyn, the ability to analyze a given design and optimally implement blocks of logic - either look-up table logic, product term logic, or embedded system blocks - into the APEX MultiCore architecture. A new advanced timing analysis tool with the capability to handle multi-clock and multi-cycle paths has been embedded in the nSTEP compiler to enhance timing driven compilation. The nSTEP compiler provides the industry's fastest timing-driven compilation, based on customer designs. This means engineers can get their designs to work at the speed they need, faster than ever before.

NativeLink Interface for Unsurpassed EDA Integration

Digital system design flows typically require the use of several different EDA tools to perform tasks from design entry and synthesis to verification and programming. This requires the efficient transfer of information from one tool to the next. NativeLink integration enables seamless linking of information between the Quartus software and other EDA tools to enhance the overall productivity of the designer's EDA tool suite.

"By giving our EDA ACCESS partners and CAE managers direct access to the Quartus programming interface, we're enabling truly native integration with the most popular third-party EDA tools," said Bob Beachler, Altera senior director of development tools marketing and product planning. "Access to the Quartus software's timing estimates enables third-party synthesis vendors to provide the highest quality-of-results for Altera's new APEX device family."

Utilizing the Quartus database, synthesis tools can access delay values at multiple points during the place-and-route process. This feature significantly improves timing estimation and provides critical feedback to synthesis engines as they optimize designs, thereby improving system performance.

"Using newly available interfaces in the Quartus software, we have seen a twenty percent improvement in performance optimization compared to older, less tightly coupled integration," said Andy Haines, vice president of marketing for Synplicity, Inc. "Coupling this raw performance improvement with the user interface integration provides users with a superlative design flow."

"The NativeLink integration capability allows us to couple FPGA Express and FPGA Compiler II to the Quartus system in ways impossible with previous software tools," said Jay Michlin, general manager of the FPGA division at Synopsys Inc. "Our latest release of software, version 3.2, supports the NativeLink feature. It allows customers to experience the increasingly tight integration that will help them take advantage of the outstanding capabilities of APEX devices."

Reduced Verification Time With SignalTap Logic Analysis

The Quartus development system features an embedded logic analysis capability built in the software. The new SignalTap logic analysis tool allows the design team to capture and analyze any signal internal to Altera's APEX devices. The first of its kind in the industry, this capability will dramatically reduce the time required for system verification, the current bottleneck in developing systems on a programmable chip.

Workgroup Design and Revision Control

Design teams, not single engineers, will create multi-million gate programmable logic designs. To keep track of the many design changes typical of system-level designs, the Quartus system provides direct integration with popular revision control systems. Alternatively, engineers will be able to easily integrate their own custom revision control systems.

"Rather than learning another proprietary revision control system, customers would much rather use their existing revision control system," said Southgate. "Therefore we chose a few of the most popular systems with which to integrate, as well as giving the user the ability to integrate their own systems."

Integrated Web-Based Support

The Quartus system takes advantage of the latest advances in computing, including the Internet and World Wide Web. "When MAX+PLUS II was created, the World Wide Web functionally did not exist," said Southgate. "The Quartus software exploits this widely used communications medium with built-in Internet awareness, facilitating software upgrades, license file delivery, and support services."

For example, within the Quartus system, designers will be able to submit service requests on-line to efficiently resolve difficult design problems. These requests are automatically sent to Altera's team of applications engineers for timely resolution, with a guaranteed 24-hour response time. Users will be able to browse their service requests to ascertain their status and resolution.

Pricing & Availability

The Quartus software is available now and is a part of all Altera development tools subscription packages. The Quartus software will support major operating systems, including Windows NT, Windows 98, Windows 95, Sun Solaris, and HP-UX. Subscription pricing is $2000 per year, which includes both Quartus and MAX+PLUS II software.

Safe Harbor Notice

This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands, that other companies will develop products with higher densities than those offered by the Company, and that yields will not be sufficient to support projected pricing. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.

About Altera

Altera Corporation, The Programmable Solutions Company, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.

  Please Give Us Feedback