For Release: March 15, 1999
Altera and Synopsys Sign Exclusive Partnership to Deliver Benefits of Programmable Logic to ASIC Designers
- Partnership Creates Seamless ASIC-to-PLD Flow for Design Compiler Users
San Jose, Calif., March 15, 1999 -- Altera Corporation (NASDAQ: ALTR) today announced an exclusive partnership with Synopsys Inc. (NASDAQ: SNPS) to provide Synopsys Design Compiler™ customers with software that would allow them to explore the benefits of programmable logic without altering their existing design flow. The result of this arrangement is a tool, FPGA Compiler II - Altera Edition, that utilizes the advanced programmable logic synthesis algorithms of Synopsys' FPGA Express and FPGA Compiler II to support Altera's FLEX® 10K, FLEX 6000 and APEX™ programmable logic devices within the Design Compiler flow. Both Design Compiler and the new FPGA Compiler II - Altera Edition will be fully supported by Altera's MAX+PLUS® II and upcoming Quartus™ development environments. FPGA Compiler II - Altera Edition, an Altera-specific version of FPGA Compiler II that contains features for a smooth migration path between ASIC and PLD devices, will be shipped to all Synopsys Design Compiler customers free of charge. This agreement, which is an extension of the five-year Altera-Synopsys technology partnership signed in 1997, enables ASIC designers to work toward System-on-a-Programmable-Chip™ design by providing an integrated tool set. Altera is the only programmable logic vendor to be supported in this manner.
"This announcement is representative of Synopsys' expanding relationship with Altera. As the capacities of programmable logic devices increase, we believe the design solution we have created together is of great benefit to customers," stated Dr. Aart de Geus, Synopsys' chairman and chief executive officer.
"Many ASIC designers have yet to realize the true benefits of programmable logic," said Rodney Smith, Altera's president and CEO. "With the FPGA Compiler II - Altera Edition, we are giving every ASIC designer the opportunity to see how a programmable logic alternative can deliver a superior solution."
ASIC designers will now be able to easily target Altera's FLEX and APEX devices without having to make modifications to their design files. Designers can now explore the advantages of programmable logic without a major time investment and without incurring additional software tool cost. As programmable logic approaches higher complexities and faster speeds, designers will witness the considerable time-to-market savings that programmable logic devices (PLDs) can provide.
"Supporting programmable logic design at the ASIC level is essential to the industry-wide move toward system-on-a-chip. Synopsys' FPGA business unit is continuing to leverage ASIC technologies that will move Synopsys' PLD customers toward this goal," stated Jay Michlin, vice president and general manager of Synopsys' FPGA business unit. "The strength of the Altera-Synopsys offering will enable smooth migration between ASICs and PLD technologies while providing excellent quality of results."
Expanded Options for the ASIC Design Community
Synopsys' Design Compiler is widely recognized as the de facto standard for ASIC design synthesis. It is estimated that over 80 percent of all ASIC designs completed in 1998 used Design Compiler for synthesis. As a result, most designers are already equipped with Synopsys' synthesis design and script files and can easily integrate FPGA Compiler II into their synthesis flow. With the architecture-specific algorithms in FPGA Express and FPGA Compiler II, engineers can achieve the benefits of higher utilization and performance for their PLD design.
"In the past, one of the major barriers that kept ASIC designers from moving to programmable logic was the fear that it would create major changes in their design flow," stated Robert Beachler, Altera's senior director of development tools marketing and product planning. "With this new tool, we are able to preserve the Design Compiler flow, while applying state-of-the-art programmable logic synthesis algorithms that clearly demonstrate the viability of the PLD solution."
Optimized Results for Design Compiler Users
FPGA Compiler II - Altera Edition provides exceptional area and performance optimization by utilizing the algorithms developed in Synopsys' FPGA Express and FPGA Compiler II. These tools were developed specifically to provide the best quality of results for programmable logic devices. In order to preserve the existing Design Compiler flow, FPGA Compiler II - Altera Edition accepts DC shell scripts, which control constraints and synthesis options, and HDL source files which are completely compatible with the Synopsys tool suite. FPGA Compiler II - Altera Edition will then pass optimized netlists to Altera's MAX+PLUS II or Quartus software for final place and route to the targeted devices. FPGA Compiler II - Altera Edition will also output .db files for analysis and verification within the Design Compiler flow. FPGA Compiler II - Altera Edition uses optimization algorithms specifically constructed for Altera's FLEX 10K and APEX architectures, leading to superior results.
FPGA Compiler II - Altera Edition is directly integrated with Altera's next-generation Quartus development system. The NativeLink™ integration capability within Quartus allows FPGA Compiler II - Altera Edition to provide design and constraint information directly into the object-oriented database structure of Quartus, removing the need for user intervention.
Pricing & Availability
FPGA Compiler II - Altera Edition will be automatically shipped to all maintained Design Compiler users beginning in Q3 1999 at no cost. Synopsys will provide a license file to activate the software for a 12-month period.
Safe Harbour Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands and that planned products will not be introduced or planned. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Synopsys
Synopsys, Inc., (NASDAQ: SNPS) is a leading supplier of electronic design automation (EDA) solutions to the global electronics market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems, and systems on a chip. Synopsys also provides consulting services and support to its customers to streamline the overall design process and accelerate time to market.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
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