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For Release: May 10, 1999
Altera Ships a Complete FIR Compiler Design Solution
- Shortens FIR Filter Design and Implementation Time from Six Weeks to One Day
- Delivers Significant Performance and Cost Benefits over DSP Processors and Standard ASSPs
- Generates Simulation Models for VHDL, Verilog, and The MathWorks' MATLAB and Simulink
San Jose, Calif., May 10, 1999 -- Altera Corporation (Nasdaq: ALTR) today announced that it is shipping a FIR Compiler supporting Altera's FLEX® and APEX™ families of programmable logic devices (PLDs). The new FIR Compiler provides performance optimization that delivers a 13x performance improvement and a 25x cost advantage over standard DSP processors. The FIR Compiler provides a complete system design environment. It generates cycle-accurate MATLAB®, Simulink®, Verilog, and VHDL simulation models. Using the seamlessly integrated design tools developed by Altera and The MathWorks, developers can quickly design, simulate, implement, and test a FIR filter-based system to enable significant cost and performance benefits versus digital signal processors (DSPs) and application-specific standard products (ASSPs).
"The FIR Compiler will cut complex, high-speed FIR filter design time from six weeks to just one day," said Craig Lytle, senior director of Altera's Intellectual Property Business Unit. "The FIR Compiler is the first of many DSP megafunctions that will automatically generate models for system-level tools such as Simulink and MATLAB from The MathWorks. When implemented on Altera PLDs, this megafunction will provide significant performance and cost benefits over DSP processors and standard ASSPs."
Altera's FIR Compiler is ideal for use in design applications such as data and
wireless communications, telecommunications, digital cable and TV, instrumentation and mass storage.
Altera's FIR Compiler increases FIR filter performance and decreases cost versus standard DSP processors or ASSPs. For example, a state-of-the-art DSP processor with 8 multiply accumulate units (MACs) performs a 101-tap, 12-bit FIR filter at 10 million samples per second (MSPS). An ASSP executes the same function at 33 MSPS. On the other hand, an Altera EPF10K50E executes this function at 125 MSPS. After factoring cost per MSPS, Altera's programmable logic-based solution costs 25x less than a DSP solution and nearly 10x less than an ASSP.
The FIR Compiler provides a complete system design environment, putting the user in control. The MegaWizard™ Plug-In, a parameterization tool which offer designers maximum flexibility in integrating complex logic cores into their designs, allows users to specify and verify parameters interactively at the system level, as well as implementation level. The user controls the number of taps, data bit-width, coefficient bit-width, sample frequency, output resolution, saturation, rounding, truncation, coefficient scaling, size/speed architecture optimization, and additional optimization based on symmetrical or anti-symmetrical properties of filters.
"We are excited to partner with Altera on this new development," said Ken Karnofsky, DSP marketing manager at The MathWorks, Inc. "By deepening our cooperative efforts, we will help guarantee our joint customers a complete system-level solution for DSP applications."
Quartus and MAX+PLUS II Design Support
Altera's FIR Compiler interfaces with the MegaWizard Plug-In capability in Altera's fourth-generation Quartus™ development environment and in the existing MAX+PLUS® II development system. An entirely new development system, Quartus provides the workgroup design environment, EDA integration, advanced compilation features, and breakthrough verification environment critical for design teams to efficiently conceive, optimize, and verify System-On-A-Programmable-Chip™ designs created for Altera's revolutionary APEX™ programmable logic architecture. The MAX+PLUS II software offers an architecture-independent development environment, which enables the designer to target designs to any of Altera's MAX or FLEX families. Both software platforms provide seamless integration with tools from Cadence, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA vendors.
Availability & Pricing
The FIR Compiler (Ordering Code: PLSM-FIR) is available now for $4,995. Included with the megafunction is a complete User Guide.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About The MathWorks, Inc.
Established in 1984, The MathWorks, Inc., based in Natick, Mass., develops, markets, and supports MATLAB, Simulink, and a family of data analysis toolboxes for engineers, scientists, and technical professionals. MATLAB provides the foundation and computational engine for all of The MathWorks products. Simulink is a graphical, block-diagram environment for modeling, analyzing, and simulating a broad range of dynamic non-linear systems. The MathWorks products are used throughout the world in industries such as automotive, aerospace, environmental, telecommunications, computer peripherals, finance, and medical.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
Figure 1. Price & Performance Comparison for PLD-Based FIR Filter vs. DSP, ASSP Solutions
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