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For Release: June 1, 1999
Altera Supports JEDEC's Approval of the Standard Test and Programming Language (STAPL)
- Support Now Available For New Standard
- Approval Tops 1-1/2 Year Effort by Industry Leaders in Silicon, Test, Programming, and System Arenas
- Acceptance as an Industry-Wide Standard Guarantees Continued Support and Enhancements
San Jose, Calif., June 1, 1999--Altera Corporation (NASDAQ: ALTR) today announced that it endorses JEDEC's approval of the Standard Test and Programming Language (STAPL) as an industry-wide standard, and that it now has support for the new standard. STAPL is a vendor- and platform-independent language for programming ISP-capable PLDs from a variety of vendors, via the IEEE standard 1149.1 interface (commonly known as JTAG). STAPL was formulated by a JEDEC subcommittee comprised of PLD vendors, programming and test vendors, and system designers using Altera's Jam™ programming language as the foundation language. The new standard provides vendors and developers with a single, universal platform for programming designs into targeted PLDs. Altera now supports the new standard, as well as the previous versions of Jam, the language that started the standardization effort.
"We developed Jam to be a vendor independent method of performing in-system programming. When Altera formed the Jam consortium in 1997, we fully intended to have the technology standardized by an industry body," said Bob Beachler, Altera senior director of development tools marketing and product planning. "We applaud the work of the JEDEC committee in taking Jam and standardizing it for broad use by the industry. Having a standard, public domain, royalty free method of performing in-system configuration and test ultimately benefits users through broad usage and ongoing support."
The approval of STAPL is the result of a year-and-a-half of work by leaders in the silicon, test, programming and systems arenas and includes revisions created in direct response to input received during the JEDEC standardization process.
Altera has had a long history of supporting open, public standards, including EDIF, LPM, Verilog, VHDL, and SDF. It has always been Altera's strategy to use these standards wherever possible in its design flows, testing, and design support. Altera now has support of this new standard, available free of charge and downloadable through the Jam website at http://www.jamisp.com. This new software also supports all previous versions of Jam, so that legacy programming files can be used.
"As an original supporter of Jam, Cypress recognizes that approval by JEDEC raises the programming and test language to industry-standard status," said Christopher Norris, vice president of Cypress Semiconductor's Programmable Logic Division. "We are confident that STAPL will be widely implemented by vendors and customers going forward, because it provides a superior solution for customers seeking multi-vendor ISP capabilities."
About STAPL
The STAPL standardization effort began when the Jam programming and test language was introduced by a consortium of companies in July of 1997, and submitted to the JEDEC subcommittee JC 42.1 in September of 1997. Since that time Jam has become the No. 1 vendor-independent method of programming ISP-capable programmable logic devices. Jam is supported today by test equipment vendors Asset InterTech, Goepel, Hewlett Packard, and Teradyne, as well as programming vendors Advin, Data I/O, Hi-Lo, Stag, System General, and Xeltek. The Jam programming language supports ISP PLDs from Altera, Cypress, Lattice, Vantis, and Xilinx.
"Teradyne has supported Jam from the beginning because it realized the reduced cost and cycle time benefits of programming devices at circuit board test for electronics manufacturers," said Harry Jin, marketing manager, Cross-Platform Software Products. "Teradyne believes the recent approval of STAPL as an industry standard for PLD programming will only encourage this trend."
The STAPL programming and test language that was developed by the JC42.1 committee is, like Jam, a vendor- and platform-independent language for programming devices through the JTAG interface. STAPL allows the specification of both the programming data and the programming algorithm in a single file, or two separate files. Once created, a STAPL file contains all the information required to program a specific design into a targeted device or chain of devices. The universal language and tool set addresses all ISP-capable PLDs and all programming methodologies.
"Data I/O is pleased about JEDEC's announcement regarding approval of the STAPL programming language," said Helmut Adamski, vice president of marketing for Data I/O Corporation. "As a user of Altera's Jam programming language, we are pleased that JEDEC has chosen to take a de facto industry standard, make appropriate enhancements to it, and give it official approval as a platform for programming logic devices worldwide."
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the closing of the purchase transaction, WaferTech's ability to yield commercial volume production, and WaferTech's positive financial contribution to Altera, may be delayed or may not occur. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Altera Corporation
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
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