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For Release: June 21, 1999
Altera Upgrades MAX+PLUS II to Version 9.3; Reduces Compile Time Significantly
- Reduces Timing-Driven Compilation Runtime by an Average of 66 Percent
- Updates Jam Composer with Support for JEDEC's STAPL Standard
- Supports 38 New Device/Package Combinations, Including 0.22-Micron FLEX 10K
Devices
San Jose, Calif., June 21, 1999--Altera Corporation (Nasdaq:ALTR) today announced
that version 9.3 of its industry-leading
MAX+PLUS® II design software will be available in July. The
MAX+PLUS II version 9.3 software reduces average compile runtimes for timing-driven
compilation by 66 percent compared to version 9.2. The new version also includes
an updated Jam™ composer and player that supports JEDEC's Standard Test
and Programming Language (STAPL). MAX+PLUS II version 9.3 also adds support
for over 30 new device/package combinations, including the entire 0.22-micron
FLEX® 10K
device family.
"Altera continues to enhance the industry's most widely used programmable logic
development tool, MAX+PLUS II," said David Greenfield, Altera director of development
tools marketing. "With the improved timing-driven compilation algorithms in
version 9.3, Altera continues to shorten design cycles and provide the fastest
time-to-market for our customers."
Reduced Compilation Times
MAX+PLUS II version 9.3 compilation algorithms have been optimized to reduce
compile times for timing-driven compilation. Designers can specify timing requirements
on selected logic functions and for a project as a whole. On average, compile
times for timing-driven compilation in version 9.3 are one-third the time compared
to MAX+PLUS II, version 9.2.
"While reducing runtimes, these new algorithms preserve the performance benefits
of using timing-driven compilation," said Greenfield.
Added STAPL Support
STAPL is a vendor- and platform-independent language for programming ISP-capable
PLDs from a variety of vendors, via the IEEE standard 1149.1 interface (commonly
known as JTAG). The new standard provides vendors and developers with a single,
universal platform for programming designs into targeted PLDs. Altera recently
announced its endorsement and support of the STAPL language as an industry-wide
standard and made available, on the Jam ISP
website (http://www.jamisp.com), an updated Jam player that supports the
standard.
With MAX+PLUS II version 9.3, Altera is upgrading all of its customers with
the latest Jam composer and player that support the STAPL standard. The Jam
Composer writes the STAPL file required to program a specific design into a
specific device. The Jam Player interprets the STAPL file and programs the target
device. These elements create a universal language and toolset that address
all ISP-enabled PLDs, and all programming methodologies.
Added Devices Support
MAX+PLUS II version 9.3 now supports 38 new device/package combinations, including
the entire 0.22-micron FLEX 10K family. This latest update in device support
now allows designers to use the most sophisticated devices in their designs,
including Altera's EPF10K100E with ClockLock™ and ClockBoost™ circuitry.
The 0.22-micron FLEX 10K family offers increased performance and lower
power consumption, when compared to 2.5-V, 0.25-micron process PLDs of similar
density.
Availability & Pricing
The MAX+PLUS II version 9.3 design software is expected to ship to all Altera
customers on active subscription and maintenance in July. Altera's
software subscription program simplifies the process of obtaining Altera
development tools by consolidating all software products and maintenance charges
into one annual subscription payment. For $2000 (single-user license), an annual
subscription will entitle a customer to receive Altera's MAX+PLUS II and Quartus™
development tools, including on-going support for the latest Altera PLDs,
new software features, performance enhancements, and on-line and printed documentation.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant
to the safe harbor provisions of the Private Securities Litigation Reform Act
of 1995. Forward looking statements are generally preceded by words such as
"expects," "believes," "anticipates," "projects," or "intends." Investors are
cautioned that all forward-looking statements in this release involve risks
and uncertainty, including without limitation the risks that the Company's products
will not satisfy customer demands, that other companies will develop products
with greater functionality than those offered by the Company. Please refer to
the Company's Securities and Exchange Commission filings, copies of which are
available from the Company without charge, for further information.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded
in 1983 and is a worldwide leader in high-performance, high-density programmable
logic devices and associated computer aided engineering (CAE) logic development
tools. Programmable logic devices are semiconductor chips that offer on-site
programmability to customers. The chips areprogrammed using tools that run on
personal computers or engineering work stations. User benefits include ease
of use, lower risk, and fast time-to-market. The company offers the broadest
line of CMOS programmable logic devices that address high-speed, high-density,
and low-power applications. Altera products serve a broad range of markets,
including telecommunications, data communications, computer peripherals, and
industrial applications. Altera common stock is traded on the Nasdaq Stock Market
under the symbol ALTR.
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