For Release: January 19, 1999
Altera Schedules Technical Seminars on Design Methodology for Multimillion-Gate PLDs
- System-on-a-Programmable-Chip™ Solutions and the ASIC Design Flow
- Next-Generation APEX™ and Quartus™ Products Demonstrated
- Intellectual Property Roadmap for PLDs Detailed
San Jose, Calif., January 19, 1999--Altera Corporation (Nasdaq: ALTR) today announced a series of seminars to introduce designers to multimillion-gate PLD design featuring Altera's APEX architecture and Quartus design software. The APEX architecture and Quartus software are part of Altera's System-on-a-Programmable-Chip solution. Details about Altera's intellectual property (IP) roadmap also will be discussed. Beginning in March, Altera engineers will present the seminars in the Asia/Pacific region, Europe, Japan, and North America. Designers of application-specific integrated circuits (ASICs), in particular, will benefit from these seminars, as they will learn how the APEX embedded architecture, advanced Quartus software, and Altera IP cores comprise a solution that integrates into ASIC design flows.
"Our high-density, embedded architecture enables APEX devices to be used in place of ASICs for system integration," said Bryon Moyer, Altera director of customer applications. "When designing with APEX devices, users will enhance engineering productivity with Quartus, which was specifically developed to support multimillion-gate devices. Teamed together, APEX, Quartus, and Altera IP cores represent a system-integration solution that delivers results comparable to custom ASIC solutions but with more flexibility and faster time-to-market."
The APEX architecture centers on the embedded system block (ESB), a multi-purpose silicon resource. Each ESB contains 2048 programmable bits that can be configured as product-term logic, dual-port RAM, ROM, or content addressable memory (CAM). By combining ESBs and logic elements (LEs) beneath Altera's continuous FastTrack® Interconnect routing structure, one APEX device is flexible enough to integrate an entire board design.
APEX and Quartus Capabilities Detailed
During the seminars, Altera representatives will demonstrate a 1-Gigabit, 8-port Ethernet switch as an example of how APEX resources are utilized in a single, large design. In addition, designers will learn about the APEX architecture's support for the 66-MHz, 64-bit PCI interface and how to benefit from multiple low-voltage I/O standards, such as GTL/GTL+, LVCMOS, LVDS, LVTTL, and SSTL-3. Phase-locked-loop (PLL) design techniques also will be shown.
Altera will demonstrate how Quartus software supports the APEX architecture with technology breakthroughs including advanced HDL synthesis for PLDs, native support for third-party EDA tool integration, incremental design compilation, and work group-based design. Quartus and Synopsys FPGA Compiler II™ tools will be demonstrated to highlight the advanced EDA integration capabilities. As part of the seminar program, Altera will explain its IP strategy, which includes IP cores from two Altera sources, Altera's in-house MegaCore™ development team and third-party megafunctions developed through the Altera Megafunction Partners Program (AMPPsm). Participants will see how Altera's Quartus software and MegaWizard™ parameterization tool are used to quickly and easily optimize an IP core.
Complementing the Quartus demonstration, the seminars will spotlight the SignalTap™ logic analysis tool, which allows designers to capture and analyze internal signals directly in the APEX device, thereby reducing verification times.
Who Should Attend, Seminar Locations
During the half-day seminars, system, PLD, and ASIC designers will see the advantages of migrating to Altera's comprehensive design solution. Designers will learn about the ease-of-use provided by the Quartus environment and the efficiency of implementing complex designs in high-capacity APEX devices. Participants at each seminar will be eligible to win an Altera software subscription-which includes Quartus and MAX+PLUS® II-and a Synopsys FPGA Compiler II software package.
The seminars will be held worldwide in the following locations: Atlanta, Austin, Bellevue, Chicago, Dallas, Dayton, Denver, Gaithersburg, Hsin-Chu, Irvine, London, Milan, Minneapolis, Munich, Osaka, Ottawa, Paris, Petaluma, Philadelphia, Phoenix, Portland, Raleigh, Rochester, Salt Lake City, San Diego, Santa Clara, Somerville, Stockholm, Tampa, Tokyo, Toronto, Westford, Woodland Hills, and Yokohama.
Register on Web or Toll Free
To register for the Altera seminars, visit the web site at www.altera.com/seminar or in North America call toll free (800) 9-ALTERA. For more details, designers should contact their regular Altera representatives.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands, that planned products will not be introduced or planned, and that margins will not be sufficient to support projected pricing. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR.
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