Altera's HardCopy® series ASICs enable you to take your system designs from prototyping into volume production much faster and with much less risk.
Prototype your designs with Stratix® series FPGAs, and then migrate your designs seamlessly to HardCopy series ASICs for volume production. Using Quartus® II design software, you can create one design using one methodology, one tool, and one set of intellectual property (IP) cores, and then ramp production when it makes sense for your market.
Learn how to get started with HardCopy series ASICs today.
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Table 1 provides an overview of the HardCopy ASIC series, and Table 2 compares specific HardCopy ASIC devices.
|Table 1. HardCopy ASIC Series Introduction|
|Device Family||HardCopy APEX||HardCopy Stratix||HardCopy II||HardCopy III||HardCopy IV||HardCopy V|
|Year of Introduction||2001||2003||2005||2008||2008||2010|
|Process Technology||180 nm||130 nm||90 nm||40 nm||40 nm||28 nm|
|Recommended for New Designs?||No||No||Yes||Yes||Yes||Yes|
|Table 2. Comparison of ASICs in the HardCopy Series|
|Feature||HardCopy II||HardCopy III||HardCopy IV E||HardCopy IV GX|
|Usable ASIC Gates (1)||1M–3.6M||2.7M–7.0M||3.8M–15M||2.8M–11.5M|
|Transceivers||-||-||-||8–36 6.5+ Gbps|
|Embedded Memory||0.86 Mb–8.6 Mb||4.1 Mb–15.9 Mb||8.1 Mb–18.4 Mb||6.3 Mb–20.3 Mb|
|18-Bit x 18-Bit Multipliers (2)||64–384||288–896||512–1360||384–1288|
- Calculated using 12 times the number of logic elements (LEs) plus 5,000 times the number of 18-bit x 18-bit multipliers.
- Multipliers are implemented using HCells.