Since 1993 Altera's MAX® CPLD series has provided the lowest power, lowest cost CPLDs. The introduction of the new MAX 10 FPGAs present a leap forward in integration and FPGA capabilities for a non-volatile programmable logic device.
|Table 1. MAX Series|
|MAX 7000S CPLD||MAX 3000A
|MAX 10 FPGA|
|Year of Introduction||1995||2002||2004||2007||2010||2014|
|Process Technology||0.50 µm||0.30 µm||180 nm||180 nm||180 nm||55 nm|
|Key Features||5.0 V I/Os||Low cost||I/O count||Zero static power||Low cost and power||Non-volatile integration|
Altera’s new MAX 10 FPGAs revolutionize non-volatile integration by delivering advanced processing capabilities in a low-cost, instant-on, small form factor programmable logic device. By providing instant-on dual-configuration with analog-to-digital converters (ADCs), and full-featured FPGA capabilities, they are optimized for a wide range of high-volume, cost-sensitive applications, including industrial, automotive, and communications.
The MAX V CPLD family delivers the market's best value. Featuring a unique, non-volatile architecture and one of the industry's largest density CPLDs, MAX V devices provide robust new features at lower total power compared to competitive CPLDs. They are ideal for general purpose and portable designs in a wide variety of market segments, including wireline, wireless, industrial, consumer, computer/storage, automotive, broadcast, and military.
The MAX II CPLD family, based on the same groundbreaking architecture, delivers low power and low cost per I/O pin. MAX II CPLDs are instant-on, non-volatile devices that target general-purpose, low-density logic and portable applications, such as cellular handset design. The MAX II CPLD also drives power and cost improvements to higher densities, enabling you to use a MAX II CPLD in place of a higher power or higher cost ASSP or standard-logic CPLD.
Zero power MAX IIZ CPLDs offer the same non-volatile, instant-on advantages found in the MAX II CPLD family and are applicable to a wide range of functions.
The MAX 3000A CPLD family is cost-optimized for high-volume applications. Manufactured on an advanced 0.30-µm CMOS process, the EEPROM-based MAX 3000A CPLD family provides instant-on capability and offers densities from 32 to 512 macrocells. MAX 3000A CPLDs support in-system programmability (ISP) and can be easily reconfigured in the field. Each MAX 3000A macrocell is individually configurable for either sequential or combinatorial logic operation.
The 5.0 V I/O MAX 7000S CPLD family is critical for industrial, military, and communication systems that require 5.0 V I/Os.