Altera's cost-optimized Arria® II FPGAs deliver the lowest power of any FPGA with up to 6.375-Gbps transceivers. Built on the 40-nm process node, Arria II FPGAs offer higher usability and efficiency for designs in the mid-range category.
Altera has taken a leadership position in reducing FPGA power consumption by combining innovative architectural features with 40-nm process technology operating at 0.9V.
Compared to the nearest competing FPGAs, Arria II FPGAs consume less than half of the total power (see Figure 1).
Figure 1. Arria II FPGA Compared to Competitive Solutions
Silicon and Architectural Optimizations
The 0.9V core voltage on Arria II FPGAs provides significant power savings over competitive technologies. Architectural optimizations on the Arria II FPGAs, including the multi-threshold transistors, variable gate-length transistors, low-k dielectric, triple-gate oxide (TGO), super-thin gate oxide, and strained silicon, contribute to further lower power consumption. For additional information on these process and circuit technologies, refer to the 40-nm Power Management and Advantages white paper (PDF).
Accurate Power Estimation and Analysis
Altera makes power estimation and analysis from design concept through implementation easy, with the most accurate and complete power management design tools in the industry. Altera offers the following power estimation and analysis resources:
- PowerPlay Early Power Estimator
- Quartus® II PowerPlay Power Analysis
- Power Management Resource Center
When designing, you can use the PowerPlay early power estimator (EPE) during the design concept phase and the PowerPlay power analyzer during the design implementation phase. The PowerPlay EPE is a spreadsheet-based analysis tool that enables early power scoping based on device and package selection, operating conditions, and device utilization. The power models in the PowerPlay EPE are correlated to silicon, ensuring an accurate estimation of your design's power consumption.
The PowerPlay power analyzer is a far more detailed power analysis tool that uses actual design placement and routing, logic configuration, and simulated waveforms to estimate dynamic power very accurately. The power analyzer, in aggregate, provides ±10 percent accuracy when used with accurate design information. Quartus II PowerPlay power models are correlated to silicon measurements based on over 5,000 test configurations per circuit.
Throughout the design process the Power Management Resource Center provides useful information regarding power, thermal management, and power supply management.
Quartus II Software Power Optimization
Design implementation details can improve performance, minimize area, and reduce power. Historically, the performance and area trade-offs have been automated within the register transfer level (RTL) through the place-and-route design flow. Altera has taken a leadership position in bringing power optimization into the design flow. Quartus II PowerPlay optimization tools automatically use the Arria II architecture capabilities to reduce power further, resulting in up to 25 percent lower dynamic power consumption compared to Arria GX devices. Combined with the silicon and architecture enhancements in the Arria II family, these efforts have resulted in over a 50 percent reduction in power consumption compared to 90-nm Arria GX FPGAs.
Quartus II software has many automatic power optimizations that are transparent to you but provide optimal utilization of FPGA architecture details to minimize power, including:
- Transforming major functional blocks
- Mapping user RAMs so they use less power
- Restructuring logic to reduce dynamic power
- Correctly selecting logic inputs to minimize capacitance on high-toggling nets
- Reducing area and wiring demand for core logic to minimize dynamic power in routing
- Modifying placement to reduce clocking power
- 40-nm FPGA Power Management and Advantages white paper (PDF)
- FPGA Power Management and Modeling Techniques white paper (PDF)
- Quartus II PowerPlay Power Analysis & Optimization Technology
- Power Management Resource Center
- Power Optimization (PDF) chapter of the Quartus II Development Software Handbook