Cyclone® III FPGAs deliver an unprecedented combination of low-power, high functionality, and low cost. The Cyclone III family’s memory-rich architecture, embedded multipliers, integrated differential I/O, and enhanced phase-locked loops (PLLs) give you the flexibility to create a single platform for multiple product lines and image resolutions.
Take a look at some of the most significant Cyclone III FPGA display application advantages:
| Table 1. Key Display Application Advantages of Cyclone III FPGAs | |
| Feature | Advantage |
|---|---|
| Abundant Memory and Multipliers |
|
| Flexible Column Driver Interface Support |
|
| Video and Image Processing (VIP) Suite |
|
| Flexible PLLs |
|
| Low Power |
|
Typical LCD TV interface
The heart of the LCD HDTV is its image-processing and timing-control block. The image-processing block typically includes functions such as scan rate converter, frame rate converter, color decoder, motion detection, scalar, and deinterlacing. Cyclone III FPGAs offer a wide range of densities to support any display, from small or low-resolution displays all the way up to large or higher resolution displays.
Figure 1. Typical LCD TV Interface Block Diagram
Cyclone III FPGAs give you a single product family to generate logic for almost any small or large screen display, even HDTV with SD video input.
Get to market faster, lower your product cost, and increase your productivity over traditional design solutions with Cyclone III FPGAs. Table 2 provides links to just some of the resources available for designing display applications.
| Table 2. Display Design Resources | ||
| Category | Resource | Description |
|---|---|---|
| Development Kit Resources | ||
| Cyclone III FPGA Starter Kit | This FPGA Starter kit is ideal for quick "out-of-the-box" evaluation experience. For display applications user I/O pins can be configured for LVDS, mini-LVDS, RSDS, or PPDS column driver interfaces. | |
| Software and Intellectual Property Resources | ||
| Video and Image Processing IP | Altera's Video and Image Processing suite of IP cores as well as H.264 and JPEG2000 encoders and decoders and image processing functions from a large eco-system of partner providers. | |
| Memory Controllers | Memory controller IP from Altera and partners for DDR, DDR2 and other popular external memory device interfaces | |
| Nios® II Embedded Processor | The world's most versatile processors supported by easy-to-use development tools and a portfolio of FPGA development kits. | |
| VIP Post Processing Reference Design | The video processing reference design shows how the cores provided in the Altera Video and Image Processing Suite can be used to create a complete video system. The design uses Altera's DSP Builder and SOPC Builder tools and several of the IP cores, including chroma resampler, color space converter, and scaler. | |
| Video-on-Demand Resources | ||
| White Papers | ||
| Using Cyclone III FPGAs for Clearer LCD HDTV Implementation | Provides an overview of how FPGAs can be used to create scalable image processing solutions to convert and map digital video signals onto the display panel while meeting the latest panel size and high definition video image quality requirements. | |
| A Flexible Architecture to Drive Sharp Two-Way Viewing Angle and Standard LCDs | An innovative architecture based on FPGAs and soft-core embedded processors that supports both standard and two-way viewing LCD products. | |
| Satisfy the Demand for Rapid Feature Enhancement in Consumer Display Products | Discusses how Cyclone III FPGAs can be used to rapidly implement new product features and enhancements in rapidly evolving consumer display products | |
| Video and Image Processing Design Using FPGAs | Looks at the trends in video and image processing that are forcing developers to re-examine the architectures they have used in the past. | |
View the Cyclone III Design Resource Center and Literature Center.
