The low-power Cyclone® III FPGA family is the third generation in the Altera® Cyclone FPGA series. With its unprecedented combination of low power, high functionality, and low cost, the Cyclone III FPGA family broadens the number of high-volume, cost-sensitive applications that can benefit from an FPGA. The Cyclone III LS variant extends the family with higher density, higher memory, smaller packages, and security features to protect your intellectual property (IP).
Tables 1 and 2 provide overviews of device features for Cyclone III and Cyclone III LS FPGAs, while Table 3 provides device package and maximum user I/O information for the FPGA family. You'll find device speed grades in Table 4 and industrial temperature support data in Table 5.
| Table 1. Cyclone III FPGA Family Overview | ||||||||||
| Device | EP3C5 | EP3C10 | EP3C16 | EP3C25 | EP3C40 | EP3C55 | EP3C80 | EP3C120 | ||
|---|---|---|---|---|---|---|---|---|---|---|
| Logic elements (LEs) | 5,136 | 10,320 | 15,408 | 24,624 | 39,600 | 55,856 | 81,264 | 119,088 | ||
| M9K embedded memory blocks (1) | 46 | 46 | 56 | 66 | 126 | 260 | 305 | 432 | ||
| Embedded memory (Kbits) | 414 | 414 | 504 | 594 | 1,134 | 2,340 | 2,745 | 3,888 | ||
| 18-bit x 18-bit embedded multipliers | 23 | 23 | 56 | 66 | 126 | 156 | 244 | 288 | ||
| Phase-locked loops (PLLs) | 2 | 2 | 4 | 4 | 4 | 4 | 4 | 4 | ||
| Maximum user I/O pins | 182 | 182 | 346 | 215 | 535 | 377 | 429 | 531 | ||
| Differential channels | 70 | 70 | 140 | 83 | 227 | 163 | 181 | 233 | ||
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| Table 2. Cyclone III LS FPGA Variant Overview | ||||||||||
| Device | EP3CLS70 | EP3CLS100 | EP3CLS150 | EP3CLS200 | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| LEs | 70,208 | 100,448 | 150,848 | 198,464 | ||||||
| M9K embedded memory blocks (1) | 333 | 483 | 666 | 891 | ||||||
| Embedded memory (Kbits) | 2,997 | 4,347 | 5,994 | 8,019 | ||||||
18-bit x 18-bit embedded multipliers |
200 | 267 | 320 | 396 | ||||||
| PLLs | 4 | 4 | 4 | 4 | ||||||
| Maximum user I/O pins | 413 | 413 | 413 | 413 | ||||||
| Differential channels | 113 | 113 | 181 | 181 | ||||||
- M9K memory blocks offer 9,216 bits per block (including parity bits).
| Table 3. Cyclone III Device Packages and Maximum User I/Os (1) | |||||||||
| Device/Package (mm x mm) |
144-Pin |
164-Pin MBGA (8 x 8) (7) |
240-Pin PQFP (32 x 32) (3) |
256-Pin FBGA |
256-Pin UBGA |
324-Pin FBGA |
484-Pin FBGA |
484-Pin UBGA (19 x 19) |
780-Pin FBGA |
|---|---|---|---|---|---|---|---|---|---|
| EP3C5 | 94 |
106 | 182 | 182 | |||||
| EP3C10 | 94 |
106 | 182 | 182 | |||||
| EP3C16 | 84 |
92 | 160 | 168 | 168 | 346 | 346 | ||
| EP3C25 | 82 |
148 | 156 | 156 | 215 | ||||
| EP3C40 |
|
128 | 195 | 331 | 331 | 535 (6) | |||
| EP3C55 |
|
327 | 327 | 377 | |||||
| EP3C80 |
|
295 | 295 | 429 | |||||
| EP3C120 |
|
|
|
|
|
|
283 |
|
531 |
EP3CLS70 |
|
|
|
|
|
|
278 |
278 |
413 |
EP3CLS100 |
|
|
|
|
|
|
278 |
278 |
413 |
EP3CLS150 |
|
|
|
|
|
|
210 |
|
413 |
| EP3CLS200 |
|
210 | 413 | ||||||
Notes:
- Color denotes vertical migration
- EQFP = Enhanced thin quad flat pack
- PQFP = Plastic quad flat pack
- FBGA = FineLine BGA (1.0-mm pitch)
- UBGA = Ultra FineLine BGA (0.8-mm pitch)
- EP3C40 in the F780 package supports restricted vertical migration
- MBGA = Micro BGA (0.5-mm pitch)
| Table 4. Cyclone III FPGA Family Speed Grades (1), (2) | |||||||||
| Device | 144-Pin EQFP | 164-Pin MBGA | 240-Pin PQFP | 256-Pin FBGA | 256-Pin UBGA | 324-Pin FBGA | 484-Pin FBGA | 484-Pin UBGA | 780-Pin FBGA |
|---|---|---|---|---|---|---|---|---|---|
| EP3C5 | -7, -8 | -7, -8 | -6, -7, -8 |
-6, -7, -8 |
|||||
| EP3C10 | -7, -8 | -7, -8 | -6, -7, -8 |
-6, -7, -8 |
|||||
| EP3C16 | -7, -8 | -7, -8 | -8 | -6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
||
| EP3C25 | -7, -8 | -8 | -6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
||||
| EP3C40 | -8 | -6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
||||
| EP3C55 | -6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
||||||
| EP3C80 | -6, -7, -8 |
-6, -7, -8 |
-6, -7, -8 |
||||||
| EP3C120 |
|
|
|
|
|
-7, -8 |
|
-7, -8 |
|
| EP3CLS70 |
|
|
|
|
|
|
-7, -8 |
-7, -8 |
-7, -8 |
EP3CLS100 |
|
|
|
|
|
|
-7, -8 |
-7, -8 |
-7, -8 |
EP3CLS150 |
|
|
|
|
|
|
-7, -8 |
|
-7, -8 |
EP3CLS200 |
|
|
|
|
|
|
-7, -8 |
|
-7, -8 |
Notes:
- Cyclone III FPGAs are available in up to three speed grades, with -6 being the fastest.
- For Cyclone III devices, Altera's guideline for core fMAX change between each speed grade is on average 15 to 20 percent.
Notes:
- Cyclone III FPGAs are available in up to three temperature grades to support varying operating environments with junction temperature support from -40°C to 125°C.
- The Cyclone III LS variant is available in two temperature grades with junction temperature support from -40°C to 100°C.
