Get a virtual tour inside Altera's MAX 10 FPGA and see the dual configuration and true fail-safe upgrade benefits provided by the on-die flash memory (1:32).
MAX 10 FPGAs offer system-level cost savings through increased integration of system component functions:
Dual configuration flash — A single, on-die flash memory supports dual configuration, for true fail-safe upgrades with thousands of possible reprogram cycles.
Analog blocks — Integrated analog blocks with ADCs and temperature sensor provide lower latency and reduced board space with more flexible sample-sequencing.
Instant on — MAX 10 FPGAs can be the first usable device on a system board to control bring-up of other components such as high density FPGAs, ASICs, ASSPs, and processors.
Nios® II soft core embedded processor — MAX 10 FPGAs support the integration of Altera’s soft core Nios II embedded processors, providing embedded developers a single-chip, fully configurable, instant-on processor subsystem.
DSP blocks — As the first non-volatile FPGA with DSP, MAX 10 FPGAs are ideal for high-performance, high-precision applications using integrated 18x18 multipliers.
DDR3 external memory interfaces — MAX 10 FPGAs support DDR3 SDRAM and LPDDR2 interfaces through soft IP memory controllers, optimal for video, datapath, and embedded applications.
User flash — With up to 736 KB of on-die user flash code storage, MAX 10 FPGAs enable advanced single chip Nios II embedded applications. The amount of user flash available depends on configuration options.
- Product Brochure: MAX 10 FPGAs - Revolutionizing Non-Volatile Integration (PDF)
- Technical White Paper: Advanced System Management with Analog Non-Volatile FPGAs (PDF)
- Technical White Paper: Five Ways to Build Flexibility into Industrial Applications with FPGAs (PDF)
- Technical White Paper: Lowering the Total Cost of Ownership in Industrial Applications (PDF)
- Technical Brief: How to Design for Increasing Power Constraints (PDF)
- Nios II Processor Documentation