Using Altera® design utilities makes designing with Stratix® II GX devices easy. Table 1 shows Stratix II GX design utilities and their descriptions.
| Table 1. Stratix II GX Design Utilities | |
| Design Utility | Description |
|---|---|
| High-Speed Board Design Advisor | Use this set of technical briefs and guidelines, best design practices, and tools to get your high-speed board design right the first time. |
| Power Distribution Network Design Tool | Power distribution network (PDN) design tool is a graphical tool used with Stratix® II GX FPGAs to optimize the board-level PDN. |
| Stratix II GX Early SSN Estimator | Evaluate the simultaneous switching noise in your design with the Early SSN Estimator spreadsheet. |
| Device Family Overview | Find the right Stratix II GX device for your design. |
| SerialLite II | Use this lightweight serial protocol with the Stratix II GX transceiver. |
| High-Speed Serial I/O Technology Center | Altera serial transceiver solutions support a number of different protocols and applications. This section describes the complete protocol solutions provided by Stratix GX and Stratix II GX FPGAs, including intellectual property (IP) and documentation. |
| Stratix II GX Eye Diagram Viewer | Online characterization tool. Review the Stratix II GX transceiver eye diagram and the positive effects of using pre-emphasis, equalization, and VOD in a typical system. |
| Serial Configuration Devices | Learn about Altera's low-cost serial configuration devices, the lowest-cost configuration devices in the industry. Specifically engineered for maximum efficiency, Altera's serial configuration devices deliver an advanced feature set while minimizing costs. |
| Software Support | Read about Quartus® II design software, which provides the highest available performance for high-density FPGA designs. |
| SOPC Builder | Read about SOPC Builder in Quartus II software, a system development tool that makes integrating IP cores at the system level easier than ever before. |
| DSP Builder | Design with Altera's DSP Builder, a digital signal processing (DSP) development tool that interfaces The MathWorks' industry-leading Simulink system-level DSP tool with Altera's industry-leading Quartus II development software. |
| DSP Solution Center | Discover the DSP solutions available from Altera that offer a broad range of support services, tools, and development platforms for implementing reconfigurable DSP designs in leading-edge FPGAs. |
| Memory Solution Center | Learn about embedded memory in Altera devices as well as external memory interfaces. Altera offers programmable logic solutions with the latest memory technologies, abundant on-chip memory resources, and off-chip data storage, with support for external memory interfaces at up to 300 MHz to meet your high-speed system requirements. |
| Signal Integrity Center | Understand signal integrity and learn how Altera devices can help overcome issues associated with high-speed I/O capability. |
| Board Design Guidelines Solution Center | Find out about guidelines for board design and manufacturing as well as board design resources. |
| Stratix II GX Device Family Questions and Answers | Get answers to common questions about Stratix II GX devices. |
| BSDL Files | Boundary scan description language (BSDL) files for Stratix II GX devices are available now. |
| Pin-Out Files | Stratix II GX pin-out files listing device pin-out descriptions are available now. |
| PowerPlay Early Power Estimator | Calculate the estimated power consumption for Stratix II GX device logic based on typical conditions. |
| IBIS Models | IBIS models for standard I/O modeling with Stratix II GX devices are available now. |
| HSPICE Models | HSPICE models for transceiver I/Os will be available soon. Please contact your local sales representative for further information. |
