Stratix® II devices feature TriMatrix memory, based on the same revolutionary memory architecture introduced in Stratix devices. TriMatrix memory is composed of three sizes of embedded RAM blocks. TriMatrix memory includes 512-bit M512 blocks, 4-Kbit M4K blocks, and 512-Kbit M-RAM blocks, each of which can be configured to support a wide range of features. Offering up to 9 Mbits of RAM, the TriMatrix memory structure makes the Stratix II device family an ideal choice for memory-intensive applications.
TriMatrix memory offers different memory structures that can implement a wide variety of memory functions found in complex designs. You can use the smaller M512 RAM blocks for first-in first-out (FIFO) functions and clock domain buffering where memory bandwidth is critical. M4K blocks are ideal for medium-sized memory applications such as asynchronous transfer mode (ATM) cell processing. M-RAM blocks are ideal for large buffering applications such as internet protocol (IP) packet buffering and system cache. Figures 1 and 2 show the TriMatrix memory structure and a variety of its applications.
Figure 1. TriMatrix Memory Structure
Figure 2. TriMatrix Memory Applications
High-Performance and High-Efficiency Memory
Stratix II devices offer a very high memory-to-logic ratio, which is made possible by the area-efficient M-RAM blocks. Stratix II devices also have smaller M512 and M4K blocks that feature 18-bit- and 36-bit-wide data ports per block, respectively, offering the highest FPGA-memory bandwidth and making them ideal for applications requiring extensive accessibility to the memory resources.
Table 1 shows the memory capacity available in Stratix II devices.
| Table 1. Memory Resources in Stratix II Devices | ||||
| Device | M512 Blocks | M4K Blocks | M-RAM Blocks | Total Memory Bits |
|---|---|---|---|---|
| EP2S15 | 104 | 78 | 0 | 419,328 |
| EP2S30 | 202 | 144 | 1 | 1,369,728 |
| EP2S60 | 329 | 255 | 2 | 2,544,192 |
| EP2S90 | 488 | 408 | 4 | 4,520,448 |
| EP2S130 | 699 | 609 | 6 | 6,747,840 |
| EP2S180 | 930 | 768 | 9 | 9,383,040 |
The high-performance TriMatrix memory RAM blocks support several features, including true dual-port memory, mixed-clock mode, and mixed-data-width support, as shown in Table 2.
| Table 2. TriMatrix Memory Features | |||
| Memory Feature | M512 Blocks 512-bits + Parity |
M4K Blocks 4-Kbits + Parity |
M-RAM Blocks 512-Kbits + Parity |
|---|---|---|---|
| Maximum Performance | 500 MHz | 550 MHz | 420 MHz |
| True Dual-Port Memory | No | Yes | Yes |
| Simple Dual-Port Memory | Yes | Yes | Yes |
| Single-Port Memory | Yes | Yes | Yes |
| Address Enable | No | Yes | Yes |
| Byte Enable | No | Yes | Yes |
| Parity Bits | Yes | Yes | Yes |
| Shift Register | Yes | Yes | Yes |
| Mixed-Clock Mode | Yes | Yes | Yes |
| Memory Preload | Yes | Yes | No |
| Configurations | 512 x 1 256 x 2 128 x 4 64 x 8 64 x 9 32 x 16 32 x 18 |
4K x 1 2K x 2 1K x 4 512 x 8 512 x 9 256 x 16 256 x 18 128 x 32 128 x 36 |
64K x 8 64K x 9 32K x 16 32K x 18 16K x 32 16K x 36 8K x 64 8K x 72 4K x 128 4K x 144 |
