Implement your high-density logic design with a Stratix® II FPGA and get high performance and great signal integrity in the most efficient device possible. Whether your design is for a single device to prototype an ASIC, or is destined for volume production, you'll benefit from knowing you can move from your Stratix II FPGA to a HardCopy® II ASIC whenever business conditions require it. Other key Stratix II FPGA features include:
- An innovative logic structure
- A rich feature set including high-performance DSP blocks and on-chip memories
- High-speed I/O pins and external memory interfaces
- A design security feature to protect your intellectual property (IP)
- A path to low-cost, high-density logic with a HardCopy II ASIC
Manufactured on the TSMC low-k dielectric process technology with up to 180K equivalent logic elements (LEs) and 9 Mbits of embedded memory, Stratix II FPGAs are the highest performance and highest density 90-nm FPGAs available. The Stratix II FPGA features Altera's redundancy technology, which dramatically increases yields and lowers device costs. The Stratix II FPGA is also optimized for total device power.
For designs in production, Altera is delivering the Stratix II FPGA family in high volume today. For your next generation system designs, Altera offers the Stratix III high-performance FPGA family.
Implemented on a 65-nm process, the Stratix III FPGA family contains three device variants—one optimized for high density logic, one optimized for DSP and memory, and one with on-chip high-speed serial transceivers. Every Stratix III FPGA employs Altera's unique Programmable Power Technology and selectable core voltage, enabling Stratix III devices to be optimized for the lowest possible power consumption on a design by design basis.
Highest Performance and Productivity Levels
Reduce your design iteration times by up to 70 percent and substantially improve your productivity compared to traditional high-density FPGA design flows by using Quartus® II software, which includes the industry's first incremental compilation feature.
Quartus II software is a comprehensive suite of synthesis, optimization, and verification tools in a single, unified design environment that enables the highest levels of productivity and the fastest path to design completion for high-density FPGA designs.
Low-Cost, No-Risk Path to ASICs
Altera offers the industry’s only seamless development path from Stratix II FPGA prototyping to high-volume, low-cost HardCopy II ASIC production. The HardCopy II ASIC further increases performance and reduces power consumption over the FPGA implementation and offers significantly lower unit costs.
Transceivers With Integrity
The Stratix II GX FPGA with transceivers is built using the Stratix II FPGA fabric. A Stratix II GX FPGA integrates up to 20 serializer/deserializer (SERDES)-based transceivers on a single device. Through careful selection of data-rates and a new clocking structure, a Stratix II GX FPGA can support a broad spectrum of protocols while dissipating significantly less power than competing solutions.
A Stratix II FPGA (shown in Figure 1) improves on the Stratix FPGA features that set new standards in FPGAs. New device capabilities—such as the new logic structure and design security technology—round out the industry’s most advanced FPGA feature set.
Figure 1. Stratix II Device Floorplan
Enhance Your Stratix II Design Skills
Altera® Technical Training courses ensure your programmable logic skills are up-to-date with the latest tools and technology for cost savings and faster time to market. Take advantage of the newest features in Altera’s Stratix II FPGA and get design tips for the Quartus II software and related EDA tools to achieve the highest performance and smallest footprint designs. The Altera Technical Training course catalog includes applicable device family literature. Register today.