Stop thinking about choosing between high density, high performance, or low power—start thinking about designing with high density, high performance, AND low power!
Think Stratix IV FPGA
You'll discover the 40-nm Stratix® IV FPGA family delivers the highest density, the highest performance, and the lowest power. Leveraging 40-nm benefits and proven transceiver and memory interface technology, the Stratix IV FPGA family provides an unprecedented level of system bandwidth with superior signal integrity. Key benefits include:
- The Stratix IV GX FPGA is fully PCI-SIG compliant for PCI Express Gen1 and Gen2 (x1, x4, and x8) and is on the PCI-SIG integrators list
- The Stratix IV GT FPGA is the only FPGA with integrated 11.3-Gbps transceivers
- Highest density with up to 820K logic elements (LEs), 23.1 Mbits of embedded memory, and up to 1,288 18 x 18 multipliers
- Highest FPGA performance with a 2 speed grade advantage and the industry's most advanced logic and routing architecture
- Unprecedented system bandwidth with up to 48 high-speed transceivers at up to 8.5 Gbps, or up to 24 transceivers at up to 11.3 Gbps optimized for 100G applications and 1,067-Mbps (533 MHz) DDR3 memory interfaces
- Lowest power with up to 50 percent lower power than any other high-end FPGA in the market enabled by 40-nm benefits and Programmable Power Technology
- Hard intellectual property (IP) for PCI Express Gen1 (2.5 Gbps) and Gen2 (5.0 Gbps) with up to four x8 blocks delivering a full endpoint or root-port function
- Superior signal integrity with the ability to drive a 50" backplane at 6.375 Gbps with Plug & Play Signal Integrity
Altera's 40-nm Stratix IV FPGA family is ideal for your high-end digital applications in wireless, wireline, military, broadcast, and many other end markets.
Think FPGA benefits and ASIC benefits. A Stratix IV FPGA, when coupled with a HardCopy® IV ASIC, provides the benefits of both an FPGA and the benefits of an ASIC. Using seamless prototyping, a HardCopy IV ASIC delivers the lowest risk, lowest total cost, fastest time-to-market, and fastest time-to-profit solution for your custom logic needs.
Think high logic utilization and short compile times. Large FPGA designs require efficient design methodology and tool support. Quartus® II development software enables the highest Stratix IV FPGA performance and productivity by incorporating the highest logic utilization and the shortest compile times in the industry. The complete design environment includes:
- Quartus II development software version
- Library of proven IP
- Nios® II, the world's most versatile embedded processor
- SOPC Builder system-level design tool, to cut weeks off of development time
- Advanced DSP Builder, the interface to MATLAB and Simulink products from The MathWorks
With Altera at 40 nm, it's not about sacrificing one benefit to gain another. Go ahead, design without compromise—think AND, not or.
