The Stratix® FPGA family, Altera's first generation of high-end FPGA families, combined an architecture tuned for high performance with the highest level of integration available on an FPGA from any vendor.
Although state-of-the-art at the time of their introduction, Stratix and Stratix GX FPGAs are now superseded by new generations in Altera's high-end Stratix series. Today, the Stratix III and Stratix IV FPGA families are the solution of choice for new high-end designs.
A Stratix FPGA can provide up to 80K logic elements (LEs) and 7.3 Mbits of on-chip RAM arranged in TriMatrix memory blocks, operating at up to 350 MHz. The Stratix FPGA supports external memory interfaces such as DDR SDRAM at 400 Mbps and QDRII SRAM at 800 Mbps. The Stratix FPGA also introduced the world's first digital signal processing (DSP) block, containing four 18 x 18 multipliers, accumulators, and a summation unit.
Stratix GX FPGA
Building on the Stratix FPGA high-performance architectural features, the Stratix GX FPGA is the first programmable logic device to incorporate high-speed serial transceivers operating at multi-gigabit speeds. Using a transceiver block supporting four full-duplex channels and clock data recovery (CDR) technology allows transmission of data in excess of 3.1875-Gbps per channel. This data rate supports many common high-speed communication protocols including SerialLite, Gigabit Ethernet, 10-Gigabit Ethernet/XAUI, SONET/SDH, Fibre Channel, the Serial RapidIO® standard, PCI Express, SFI-5, and SPI-5.