SoC FPGAs: Integration to Reduce Power, Cost, and Board Size
SoC FPGAs integrate an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. It combines the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic.
These user-customizable ARM-based SoC FPGA are ideal for the following:
- Reducing system power, cost, and board size by integrating discrete processors and digital signal processing (DSP) functions into a single FPGA
- Differentiating your end product with custom hardware and software
- Adding support for virtually any interface standard or protocol in the FPGA
- Extending product life and revenue through hardware and software updates in the field
- Improving system performance via high-bandwidth interconnect between the processor and the FPGA
These devices join the diverse family of Cyclone® V and Arria® V FPGAs with dozens of devices – and hundreds of part number variations – and include additional hard logic such as PCI Express® Gen2, multiport memory controllers, and high-speed serial transceivers. Built on TSMC's 28-nm Low-Power (28LP) process, the SoC FPGAs drive down power and cost while enabling performance levels required by cost-sensitive applications.
ARM-Based HPS
The HPS consists of a dual-core ARM® Cortex™-A9 MPCore™ processor, a rich set of peripherals, and a multiport memory controller shared with logic in the FPGA, giving you the flexibility of programmable logic and the cost savings of hard IP due to the following reasons:
- Hardened embedded peripherals eliminate the need to implement these functions in programmable logic, leaving more FPGA resources for application-specific custom logic and reducing power consumption
- Hardened multiport memory controller, shared by the processor and FPGA logic supports DDR2, DDR3, Mobile DDR, and LPDDR2 devices with integrated error correction code (ECC) support for high-reliability and safety-critical applications
High-Bandwidth Interconnect
High-throughput datapaths between the HPS and FPGA fabric provide interconnect performance not possible in two-chip solutions. The tight integration between the HPS and FPGA fabric provide over 100-Gbps peak bandwidth with integrated data coherency between the processors and the FPGA. Eliminating the external I/O paths between the processor and the FPGA provides significant system power savings.
Flexible FPGA Fabric
The flexibility offered by the FPGA logic fabric lets you differentiate your system by implementing custom IP or off-the-shelf preconfigured IP from Altera or its partners into your designs. This allows you to do the following:
- Adapt quickly to varying or changing interface and protocol standards
- Add custom hardware in the FPGA to accelerate time-critical algorithms and create a compelling competitive edge
- Quickly deploy a custom ARM processor without the extensive design, verification, and NRE costs required in ASICs
Complete Design Resources
To assure a smooth, successful design flow that turns your ideas into revenue more quickly than ever before, Altera's Qsys system integration tool saves you time and effort in the FPGA design process, simplifying the development of complex hardware systems. Qsys automatically generates FPGA-optimized network-on-a-chip (NoC) interconnect logic to connect IP functions and subsystems, system testbench, simulation model, software header file, and data sheet to expedite development across hardware and software teams. Altera provides a complete design environment including the following:
Start Developing Software Today
Altera provides virtual prototyping tools for SoC FPGA devices, enabling you to work more productively, improve your software quality, and ultimately, get to market faster. Altera's SoC FPGA Virtual Target is a fast functional simulation of an embedded development board. It's a register- and binary-compatible equivalent to the hardware that it simulates. While the Virtual Target runs on a Windows or Linux PC, you can use it the same way you use a development board – run your operating system and application code, connect to it using standard ARM development tools, and then develop and debug your firmware and application. The SoC FPGA Virtual Target provides unparalleled software control and visibility, and enables more powerful debugging capabilities for complex, multicore embedded systems.
