SOPC World 2008 Agenda and Technical Sessions

Date: November 5, 2008 Location: Milan, Italy Altera® Featured Technology: System-on-a-Programmable-Chip (SOPC) Solutions Region: Europe Events

Agenda

Morning Session

Think AND, Not OR

FPGAs have long been the preferred and convenient silicon solution for design engineers when time to market is critical or when an ASIC is too risky or expensive to develop. The decision between using an FPGA or an alternative ASIC or ASSP used to entail tradeoffs in performance and power consumption. Many of those tradeoffs are no longer necessary. The functionality and performance of FPGAs continue to grow significantly, while power consumption for equivalent functions has dropped dramatically. Come see how advancements to FPGAs and FPGA design tools now allow you to think AND, not OR.

Altera's product portfolio tuned for higher performance and lower power

Earlier this decade, Altera realized power was fast becoming the most important factor for all semiconductor designs. From handheld to large infrastructure applications and everything in between, power affects cost, performance, reliability, and longevity of all end products. To address this challenge, Altera began a long term effort to reduce power in its portfolio of CPLDs, FPGAs, and ASICs by focusing on process advancements, new power management technology and power optimized design tools. All of this was done in conjunction with innovations to increase device performance. The result is a complete portfolio of devices that allow you to power down AND speed up.

Enhance system performance and productivity by leveraging best-in-class tools

The latest families of high-performance FPGAs, offer twice the density and greater levels of performance than the previous generation. The opportunities to develop system level solutions are therefore endless. To harness the FPGA advantage, it is more important than ever for the tool flow to minimize development times and reduce design complexity.

Afternoon Session—Solutions for Industrial and Video Applications

Why you’ll want to think Altera when you think about your next embedded system

Embedded processing designers today are faced with the dilemma of meeting demand for increased performance, driven by end applications, and also the call for decreased power, spurred by energy concerns. The balance of performance and power has always been a tradeoff, in which design, system architecture, component-level performance and power, are all taken into account…until now. During this technical session's presentation, you will find how Altera's comprehensive embedded solutions portfolio of devices, intellectual property (IP), software, reference designs, and development kits with real examples enables designs to have both increased performance AND reduced power.

Building a video system using the Altera Video and Image Processing (VIP) Suite

In all video processing applications—from production, storage, transmission, and reception—video technology is quickly being replaced by its digital video counterpart. From a broadcaster's point of view, equipment has to be upgraded to keep pace with the demand for digital television (DTV) and high-definition television (HDTV). On the consumer side, 1080p or full HD television displays are being widely adopted by consumers, setting the stage for content creation and distribution in 1080p. Much of the studio and video hardware for video processing and distribution is expected to change soon to support 1080p.

Learn how to rapidly develop such high-performance systems, with Altera’s video and image processing framework that has readily available functions with standard interfaces and a means to add customization or third-party IP into the design.

Implementing low-cost, flexible Industrial Ethernet and motor control solutions with FPGAs

The requirement for the integration of office and factory communications combined with the low cost and high performance of Ethernet are driving the adoption of Ethernet-based networking in the factory environment. However, the more demanding requirements of industrial applications mean that often a standard corporate style Ethernet implementation is not good enough. There are many Ethernet-based industrial network solutions that require custom hardware and proprietary software stacks.

In this session, you'll learn how an FPGA can support any 802.3-based Industrial Ethernet protocol (past or future) and support flexible motor control applications from a single board design, which simplifies the board's development and maintenance. By taking advantage of the advanced capabilities of low-cost FPGAs, a wide range of IP and powerful development tools, you can reduce the cost, increase the flexibility, and minimize the time to market of your industrial products.

Afternoon Session—Solutions for Communications Applications

Reach new levels of SoC integration in your communications platforms

FPGAs are an ideal platform for system-on-a-chip (SoC) integration due to their inherent flexibility and time-to-market advantages. Altera's 40-nm custom logic portfolio, which includes the new Stratix^® IV FPGAs and HardCopy^® IV ASICs, offers benefits in terms of density, performance, features, and interface bandwidth for new levels of SoC integration in your communications platforms.

Implementing high-speed, high-performance, transceiver-based designs with 40-nm FPGAs

High-speed serial I/O is now being widely adopted across many markets including communications, medical, industrial, broadcast, test and measurement, storage, and military. Designers have many challenges to face when implementing transacted designs, including signal integrity, supporting multiple data rates and the ability to generate a universal solution for multi-slot backplane applications.

This session will discuss some of the challenges faced by engineers when implementing high-speed channel design or developing multi-rate line cards. We will show how Altera FPGAs can help to simplify design at data rates of up to 8.5 Gbps.

How to facilitate advanced DSP design when facing performance and time-to-market challenges

This session will demonstrate how the latest development tools from Altera and our EDA partners can enable system designers to unleash the DSP capabilities of the FPGA, whilst driving down the implementation time and opening the technology to new engineers. We will also demonstrate how Quartus^® II design software can assist design teams in successfully meeting functional and performance goals, and help them to achieve their aggressive time-to-market schedules.