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Date: November 5, 2008 |
Power Down, Speed Up
Event Details
Join experts from Altera on Wednesday, November 5, 2008, for a FREE one-day technical seminar focused on high-performance, low-power solutions using FPGAs.
Today's and tomorrow's designs need to lower system costs, stay within tight power budgets, increase productivity and be created in cooperation with a global team. At the same time, to stay competitive, applications require higher performance levels, better signal integrity, and the ability to deliver more and better features than currently available.
How do you power down to meet global demands for lower power consumption and still speed up to meet the equally important market demands?
For years, designers like you have been forced to sacrifice performance to save power OR consume power to gain performance. But, with the technology breakthroughs incorporated in Altera's portfolio of low-power products, you no longer have to make these compromises:
- New, 40-nm Stratix® IV FPGAs and HardCopy® IV ASICs deliver industry-leading advances in power, performance and density with state-of-the-art transceiver technology
- Stratix III 65-nm FPGAs allow you to lower power consumption while still meeting your design performance needs with Programmable Power Technology
- Cyclone® III FPGAs deliver an unprecedented combination of low power, high functionality, and low cost
- Zero-power MAX® IIZ CPLDs bring power, package, and price leadership to portable applications
Join us at SOPC World this year to learn how you can stop thinking about how to design for low power OR high performance, and start thinking about next generation designs with low power AND high performance. SOPC World 2008 offers key technical sessions providing useful tips to help you make the right choices and strengthen your competitive edge.
Agenda
| Time | Topic | |
|---|---|---|
| 8:30 to 9:15 | Registration | |
| 9:15 to 9:30 | Opening and Welcome Speech | |
| 9:30 to 10:15 | Keynote Speech: Think AND, Not OR | |
| 10:15 to 10:35 | Enhance system performance and productivity by leveraging best-in-class tools |
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| Coffee Break & Exhibition | ||
| 11:00 to 11:45 | Altera's product portfolio tuned for higher performance and lower power | |
| 11:45 to 12:15 | Innovate Italy Award Presentation | |
| Lunch Break & Exhibition | ||
| Tracks | Solutions for Industrial and Video Applications | Solutions for Communications Applications |
| 1:30 to 2:15 | Why you’ll want to think Altera when you think about your next embedded system |
Reach new levels of SoC integration in your communications platforms |
| 2:15 to 3:00 | Building a video system using the Altera Video and Image Processing (VIP) Suite |
Implementing high-speed, high-performance, transceiver-based designs with 40-nm FPGAs |
| Break & Exhibition | ||
| 3:30 to 4:15 | Implementing low-cost, flexible Industrial Ethernet and motor control solutions with FPGAs |
How to facilitate advanced digital signal processing (DSP) design when facing performance and time-to-market challenges |
| 4:15 to 4:30 | Close | |


