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Date: February 4, 2005 |
Designing With High-Speed Serial Interconnect
Keynote Speaker
Dr. Eric Bogatin, lecturer and author of four books and over 200 papers on signal integrity and interconnect design, will be the keynote speaker at Altera’s High-Speed Serial Design Seminar on “A Designer’s Survival Guide to High-Speed Serial Link Interconnects”. His latest book, Signal Integrity—Simplified, was published in 2003 by Prentice Hall. He has taught over 4,000 engineers in the last 20 years and writes the "No Myths Allowed" column on signal integrity for Printed Circuit Design and Manufacture magazine.
What to Expect
In this seminar you will learn the most important principles, design rules, tools, and technology options for designing high-speed serial link interconnects. You will also learn from industry experts on how to select and design with connectors, transceivers, and boards for multi-gigabit serial data rates. If you currently design Gbps serial links, or expect to, you won’t want to miss this seminar.
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Table 1. Event Agenda |
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| Time | Activity | Key Topics Covered | Presenter |
|---|---|---|---|
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8:30 AM |
Breakfast/Registration |
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9:00 AM |
Keynote Address |
A Designer’s Survival Guide to High- Speed Serial Link Interconnects |
Dr. Eric Bogatin |
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10:20 AM |
Presentation |
The Realities of Channel Synergy |
John D’Ambrosia |
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10:50 AM |
Presentation |
Understanding the High-Speed Backplane Inter-Connect |
Gautam Patel |
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11:20 AM |
10 Minute Break |
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11:30 AM |
Presentation |
Developing Complete Systems With Serial Links |
Jim Tavacoli |
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12:30 PM |
Presentation |
State of the Art of Electrical High-Speed Backplanes |
Franz Gisin |
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1:15 PM - |
Lunch / Exhibits |
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Venue Details
The Westin Santa Clara
5101 Great America Parkway
Santa Clara, CA 95054-1132
(408) 986-0700
http://www.westin.com/santaclara
If you would like someone to contact you regarding Altera's high-speed solutions, please email workshop@altera.com.
