Course Description
Note: Altera recommends using DSP Builder Advanced Blockset for new designs. This allows design optimization to the required system Fmax, latency control, vector & multi-channel designs, advanced math functions & fixed point & single & double precision floating point datapath. Altera recommends to use Standard Blockset as a wrapper to DSP Builder Advanced Blockset Learn to implement DSP designs in an FPGA. You'll use DSP Builder which is an interface between Quartus® II software v. 10.1 & Mathworks Matlab Simulink tools. Analyze, implement, & verify DSP systems using the DSP Builder blockset in Matlab & Simulink. Increase simulation speed by co-simulating a design with a FPGA board using Hardware in the Loop. Co-simulate ModelSim RTL-level models. Parameterize & verify a DSP algorithm.At Course Completion
You will be able to:- Implement DSP algorithms using Altera® DSP Builder
- Parameterize DSP Builder blocks using MATLAB
- Perform RTL simulation using ModelSim-Altera
- Increase simulation speed via hardware-in-the-loop
- Perform system-level simulation using MATLAB script
- Understand the Avalon Streaming Interface
Skills Required
- Background in digital logic design
- Familiarity with DSP fundamentals and design
- Familiarity with Altera® FPGA architecture is helpful, but not necessary
- Familiarity with Mathworks Matlab and Simulink are helpful, but not necessary
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):Applicable Training Curriculum
This course is part of the following Altera training curriculum:No class is being offered at this time
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