Course Description
Learn the timing-driven Simulink design flow to implement high-speed DSP designs. This course focuses on implementing DSP algorithms using the advanced blockset capability of DSP Builder—an interface between Quartus® II software v 10.1 & Mathwork’s Matlab & Simulink. You'll analyze & design your DSP algorithm using the DSP Builder advanced blockset in Matlab & Simulink. According to your system-level constraints, the timing-driven Simulink synthesis flow will automatically pipeline & time-share hardware. You'll explore architecture & performance tradeoffs with system-level constraints. Also you'll verify functionality & performance of generated hardware in the Quartus II software. Finally, you'll speed design time by incorporating ready made ModelIP cores.At Course Completion
You will be able to:- Implement DSP algorithms using Altera® DSP Builder Advanced Blockset
- Incorporate ModelIP cores in design
- Explore design architecture and performance tradeoffs using system level constraints
- Verify the hardware performance and implementation in Quartus II software
Skills Required
- Familiarity with DSP fundamentals and design
- Familiarity with Altera® Quartus II software is helpful, but not necessary
- Familiarity with Mathworks Matlab and Simulink is helpful, but not necessary
- Familiarity with digital modem design is helpful, but not necessary
Applicable Training Curriculum
This course is part of the following Altera training curriculum:Class Schedule
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| Location | Dates | Price | ||
| Arrow - Columbia, MD (Instructor-Led) | 2/21/12 | $495 | Register Now | |
| Denver, CO (Instructor-Led) | 3/20/12 | $495 | Register Now | |
| Chelmsford, MA (Instructor-Led) | 6/5/12 | $495 | Register Now | |
| Richardson, TX (Instructor-Led) | 7/17/12 | $495 | Register Now | |
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