FPGA, CPLD, and ASIC solutions from Altera
  • Download Center
  • Literature
Sign in/register
myAltera Account
Welcome
  •   myAltera
  •   Logout
  • Products
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design & Support Services
    • Literature
  • End Markets
    • Automotive
    • Broadcast
    • Computer & Storage
    • Consumer
    • Industrial
    • Medical
    • Military
    • Test & Measurement
    • Wireless
    • Wireline
  • Technology
    • DSP
    • External Memory
    • Embedded Processing
    • Transceivers
    • Parallel I/O
    • Signal Integrity
    • System Integration
  • Training
    • Training Courses
    • University Program
    • Webcasts & Videos
    • Demonstrations
    • Events Calendar
  • Support
    • Design & Support Resources
    • Knowledge Database
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design Examples
    • Downloads
    • User Communities/Forums
    • mySupport
  • About Altera
    • About Us
    • Environmental
    • Customer Successes
    • Partners
    • Newsroom
    • Investor Relations
    • Jobs
    • Contact Us
  • Buy Online
    • Devices
    • Design Software
    • Development & Education Kits
    • Cables & Programming Hardware
    • Intellectual Property
  • Entire Site
  • Part Number
  • Knowledge Database
  • Support & Technical Docs
  • Forums & Wiki
Username:  
Password:  
 
Forgot my username or password
Don't have myAltera account? Register Now.
Enter your email address:

The Quartus II Software Design Series: Verification (IDSW130)
8 Hours Instructor-Led Course

Home > Training > Training Courses > Course Catalog > Course

Course Description

You will learn features of the Quartus® II software v. 9.1 that will enable you to verify your FPGA design*. You will learn how to simulate Altera IP and megafunctions in other EDA simulation tools and how to use NativeLink to simulate directly in the Quartus II software from 3rd-party tools. You will also estimate FPGA power consumption using tools found in the Quartus II software. You will use debugging tools available in the Quartus II software, such as the SignalTap® II embedded logic analyzer, In-System Sources & Probes, & the Logic Analyzer Interface. You will learn to select the correct tool to effectively debug your design. *Some (not all) features examined by this course apply to CPLD designs

At Course Completion

You will be able to:
  • Analyze power consumption with the PowerPlay power analyzer
  • Debug designs in-system using the SignalTap II embedded logic analyzer
  • Connect internal debug nodes to an external logic analyzer using the Logic Analyzer Interface
  • View & edit embedded memory contents using the In-System Memory Content Editor
  • Make incremental design changes with Chip Planner

Prerequisites

We recommend completing the following courses:
  • The Quartus II Software Design Series: Foundation (Instructor-led Training)
  • The Quartus II Software Design Series: Foundation (Online Training)

Skills Required

  • Experience with PCs and the Windows operating system
  • Completion of "The Quartus II Software Design Series: Foundation" course OR a working knowledge of the Quartus II software

Applicable Training Curriculum

This course is part of the following Altera training curriculum:
  • ASIC-to-FPGA Designer
  • FPGA Designer
  • HardCopy Designer
  • Transceivers

Class Schedule

Result Showing 6                                                                                                                                  
Location Dates Price  
Richardson, TX3/24/10$495Register Now
San Jose, CA4/14/10$695Register Now
Chelmsford, MA4/28/10$695Register Now
Altera- Kenilworth, NJ6/9/10$695Register Now
Arrow - Mississauga, ON Canada6/16/10$695Register Now
Schaumburg, IL6/18/10$695Register Now

Request a class in your region

Rate This Page


  • Select a Course
    • Course Catalog
    • Class Schedule
    • Curricula
      • CPLD Designer
      • FPGA Designer
      • ASIC-to-FPGA Designer
      • HardCopy Designer
      • DSP Designer
      • SOC Designer
      • Embedded HW Designer
      • Embedded SW Designer
      • Transceivers
      • Scripting
    • Search Courses
  • Your Training
    • Manage Your Courses
  • About Altera Training
    • Training Types
    • Training Options
    • Training Partners
    • Training Credits
  • Training Support
    • Training FAQ
    • Training Help
    • Altera.com Account Help
    Please give us feedback
    Products | End Markets | Technology | Training | Support | About Altera | Buy Online
    Jobs | Investor Relations | Contact Us | Site Map | Privacy | Legal Notice
    Copyright © 1995-2010 Altera Corporation. All Rights Reserved.
    Altera Forum
    Altera
    Forum
    Twitter
    Twitter
    RSS
    RSS
    Facebook
    Facebook
    Flickr
    Flickr
    YouTube
    YouTube
    Email Updates
    Email
    Updates