Course Description
This course has Simplified Chinese audio. High-speed transceiver-based FPGAs are more quickly becoming mainstream devices in the programmable logic space today. This course provides an architectural overview of the transceivers found in transceiver-based FPGAs, using the Stratix® II GX device family as a guide. By the end of this training, you will be able to define the blocks found in the both the transmitter and receiver data paths along with their purposes. You will also be able to specify which blocks make up the digital physical coding sub-layer (PCS) and the analog physical media attachment (PMA).At Course Completion
You will be able to:- Describe the blocks found in the transmitter and receiver paths of FPGA high-speed serial transceivers
- Define which blocks make up the physical coding sub-layer and which make up the physical media attachment
Skills Required
- Background in digital logic
- General understanding of FPGA architecture
Applicable Training Curriculum
This course is part of the following Altera training curriculum:Class Schedule
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| On-line | Any Time | Free | Register Now | |
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