Course Description
This training presents a technical overview of the new features in the Quartus® II software v. 9.1. This version provides support for the new Cyclone® IV GX device family. It also further expands the Quartus II leadership in compile time and timing closure with new features. You will learn about initial synthesis support for VHDL-2008. You will also learn about I/O system design enhancements, Avalon® verification IP, Nios® II Software Build Tools for Eclipse, and external memory interface enhancements.At Course Completion
You will be able to:- Identify the Quartus II software version 9.1 enhancements and their benefits
- Access the newest features in Quartus II 9.1 software
Prerequisites
We recommend completing the following courses:Skills Required
- Background in digital logic design
- Familiarity with the Quartus II software
Applicable Training Curriculum
This course is part of the following Altera training curriculum:- ASIC-to-FPGA Designer
- CPLD Designer
- Embedded HW Designer
- FPGA Designer
- HardCopy Designer
- Transceivers
Class Schedule
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| Location | Dates | Price | ||
| On-line | Any Time | Free | Register Now | |
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