|
|
 |
Introduction to Incremental Compilation
(ODSW1136)
2 Hours
Online Course
Course Description
You will learn how to preserve design performance and reduce compilation time by using the incremental compilation feature of the Quartus® II software v. 7.2. By the end of this training, you will be able to use LogicLock™ regions in physical partitioning of your design. You will be able to segment your design into logical design partitions. You will be able to apply the incremental compilation methodology to both the top-down and bottom-up design flows.
At Course Completion
- Creation and management of LogicLock regions
- Creation and management of design partitions
- Setting and performing incremental compilation
- Using incremental compilation in the top-down design flow
- Using incremental compilation in the bottom-up design flow
- Set up a top-level project with constraints for a team-based design flow
- Generate bottom-up design partition scripts
- Export a lower-level design and import it into the top-level design
Prerequisites
We recommend completing the following courses:
Skills Required
- Background in digital logic design
- Familiarity with using the Quartus II software
Applicable Training Curriculum
This course is part of the following Altera training curriculum:
Class Schedule
Request a class in your region
|
|
|
Literature
> 
