SignalTap II Embedded Logic Analyzer: Getting Started (ODSW1164)
2 Hours Online Course

Course Description

This training describes the benefits and use of the SignalTap® II embedded logic analyzer for on-chip debugging within the Quartus® II software v. 11.0. Upon completion of this training, you will be able to perform the major tasks required for a SignalTap II debugging process flow. You will also know where to go to find additional support and information resources.

At Course Completion

You will be able to:

• Add one or more instances of the SignalTap II logic analyzer to a design
• Configure the SignalTap II logic analyzer to debug the design
• Use the logic analyzer with incremental compilation to reduce recompile times
• Operate the SignalTap II logic analyzer to capture data as defined by the trigger settings
• Analyze data captured by the trigger condition(s) & use it to locate & fix bugs in the design
• Use storage qualification, state-based triggering flow & power-up triggers

Prerequisites

We recommend completing the following courses:

• Using the Quartus II Software: An Introduction

Skills Required

• Basic knowledge of the Quartus II software
• Knowledge of external logic analyzer operations (optional)

Applicable Training Curriculum

This course is part of the following Altera training curriculum:

• ASIC-to-FPGA Designer
• FPGA Designer

Class Schedule

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Location	Dates	Price
On-line	Any Time	Free	Register Now

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