Course Description
High-speed transceiver-based FPGAs are mainstream devices in the programmable logic space today. This online course provides an overview of the transceivers found in transceiver-based Altera® FPGAs in the Quartus® II software version 11.1. By the end of this training, you will be able to define the blocks found in the both the transmitter and receiver data paths along with their purposes. You will also be able to specify which blocks make up the digital physical coding sub-layer (PCS) and the analog physical media attachment (PMA).At Course Completion
You will be able to:- Describe the blocks found in the transmitter and receiver paths of FPGA high-speed serial transceivers
- Define which blocks make up the physical coding sub-layer and which make up the physical media attachment
Skills Required
- Background in digital logic
- General understanding of FPGA architecture
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):- 10/100/1000 Mb Ethernet Design with Altera Transceiver Devices: Introduction
- Getting Started with PCI Express Designs in Altera Transceiver Devices
- Introduction to Altera's 10Gb Ethernet Solutions
Applicable Training Curriculum
This course is part of the following Altera training curriculum:Class Schedule
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| On-line | Any Time | Free | Register Now | |
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