DSP Designer Curriculum

A DSP designer is a hardware engineer implementing a digital signal processing (DSP) application using an FPGA. These engineers include engineers and scientists working on DSP modeling, software and hardware implementation and optimizing algorithms on an FPGA architecture.

Before taking this curriculum, Altera recommends reviewing the Design and Support Resources Guide as a starting place to get an overview of all of the collateral, tools, training, resources, and support available to help you throughout your design cycle. If you are new to programmable logic, this guide will help you quickly get started with Altera.

Instructor-led Training				Online Training
Best Practices for Maximizing FPGA Design Productivity (IPRO200) (16 hours)				Read Me First! (ORMF1000) (0.5 hours) 简体中文 (OCRMF1000)
Designing with DSP Builder (IDSP210) (8 hours)	and/ or	Designing with DSP Builder Advanced Blockset (IDSP220) (8 hours)		Building Video Systems (ODSP1117) (0.5 hours) 简体中文 (OCDSP1117)
Introduction to VHDL (IHDL110) (8 hours)	or	Introduction to Verilog HDL (IHDL120) (8 hours)		DSP System Design with DSP Builder (ODSP1110) (1 hour)
The Quartus ® II Software Design Series: Foundation (IDSW110) ((8 hours)				简体中文 (OCDSP1116) (0.5 hours)
				Designing with DSP Builder Advanced Blockset: An Overview (ODSP1115) (1 hour) 简体中文 (OCDSP1115) (1 hour)
				Using SOPC Builder (OEMB1115) (1 hour) 简体中文 (OCEMB1115)
				Custom Components for SOPC Builder (OEMB1111) (1.5 hours)
				Using Cascaded-Integrator- Comb Filter in Multirate Digital Systems (OCIC1110) (1 hour)	Viterbi Decoder (OVTBI1110) (1 hour)
If you wish to target specific features in the FPGA you may wish to go through the FPGA designer curriculum at this point. If your application uses an embedded processor you may wish to go through one of the embedded curriculums at this point.