HardCopy Designer Curriculum

This curriculum is designed for hardware engineers with experience designing ASICs and who are familiar with VHDL or Verilog HDL. These engineers are targeting a HardCopy^® ASIC.

Before taking this curriculum, Altera recommends reviewing the Design and Support Resources Guide as a starting place to get an overview of all of the collateral, tools, training, resources, and support available to help you throughout your design cycle. If you are new to programmable logic, this guide will help you quickly get started with Altera.

Instructor-led Training		Online Training
Best Practices for Maximizing FPGA Design Productivity (IPRO200) (16 hours)		Read Me First! (ORMF1000) (0.5 hours) 简体中文 (OCRMF1000)
The Quartus® II Software Design Series: Foundation (IDSW110) (8 hours)		The Quartus II Software Interactive Tutorial (ODSW1050) (4 hours)
The Quartus II Software Design Series: Timing Analysis (IDSW120) (8 hours)		Using the Quartus II Software: An Introduction (ODSW1100) (1.5 hours) 简体中文 (OCDSW1100)	or	Quartus II V9.0 基礎編-1 Settings と Assignments (OJDSW1111) (1 hour)	or	The Quartus II Software Design Series: Foundation (ODSW1110) (8 hours) 简体中文 (OCDSW1110)
The Quartus II Software Design Series: Verification (IDSW130) (8 hours)		I/O System Design (ODSW1107) (2 hours) Quartus II V9.0 基礎編-2 I/O プランニング (OJDSW1112) (0.5 hours)
The Quartus II Software Design Series: Optimization (IDSW140) (8 hours)		Advanced I/O System Design (ODSW1108) (1.5 hours) 简体中文 (OCDSW1108) (1.5 hours)
		TimeQuest Timing Analyzer (ODSW1115) (2 hours) 简体中文 (OCDSW1115) Quartus II V9.0 基礎編-4 タイミング解析( TimeQuest ) (OJDSW1115) (1 hour)
		What’s New in the Quartus II Software Version 9.1 (ODSW1103) (1 hour)
		The Quartus II Software Design Flow for HardCopy ASICs (OHC1111) (0.5 hours)
		Simulating Designs with 3rd Party EDA Simulators (ODSW1122) (1 hour)
		Power Analysis with the Quartus II Software (ODSW1146) (1 hour)				External Memory Solutions Overview (OMEM1109) (0.5 hours)
		Power Distribution Network Design for Stratix III and Stratix IV FPGAs (OPDN1100) (0.5 hours)				Using High-Performance Memory Interfaces in Altera® FPGAs (OMEM1110) (2 hours)
		Power Distribution Network Design Using Altera PDN Design Tools (OPDN1105) (0.5 hours)				Constraining and Analyzing Timing for Source Synchronous Circuits with TimeQuest (ODSW1160) (1 hour)
						Constraining and Analyzing Double Data Rate Source Synchronous Interfaces (OMEM1120) (1 hour)