Computer Organization Laboratory Exercises

Altera provides a number of ready-to-teach laboratory exercises for computer organization courses. The exercises address the basic concepts, which include assembly language programming, subroutines, stacks, input/output techniques, bus structure, and arbitration.

Altera has developed a new set of laboratory exercises for computer organization, listed in the table below. The introductory exercises make use of the DE-series Basic Computer. They illustrate the programmer's view of a computer, including the assembly language, stacks, subroutine linkage, and input/output transfers.

Some of the exercises require the use of the Qsys software to design and implement a Nios II system, instead of using the DE-series Basic Computer. There are also an exercise that introduces the student to the processing of sound signals and to the elements of graphics and animation. These exercises use the DE-series Media computer, which incorporates facilities for dealing with sound and video applications.

As an aid for instructors, a complete solution for each lab exercise is available, including the appropriate Nios II assembly language or C source code. Unformatted text versions of these exercises and the source files for the figures are also available.

• Source code and solutions

The following table shows the available laboratory exercises. The exercises are avalable in both Verilog and VHDL, and for several DE-series boards. Use the filters below to choose the ones that are appropriate for your course.

Earlier versions of the Computer Organization Exercises can be found here.