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Available Now, On-Demand: August 22, 2007 - August 21, 2008 |
Overview
Stratix III I/Os deliver the features required for the latest generation of double data rate memories. These features include:
- Leveling, which is required for DDR3 SDRAM DIMMs and not offered by competing FPGAs;
- Dynamic on-chip termination, for proper line termination;
- Variable input and output delay, for de-skew; and
- 31 registers behind each I/O pin, to handle all double data rate needs.
In only two years, it's expected that implementing DDR2 will be more expensive than implementing DDR3. If you're starting system designs today that will be in production in 2009 or later, you should consider DDR3 for its cost and power advantages. View this net seminar to understand how DDR3 works and what's required in an FPGA to effectively implement DDR3.
This 25-minute net seminar includes an in-depth look at:
- Variable input and output delay for de-skew
- Dynamic on-chip termination
- DQS capture
- Read / write leveling for DDR3
- Calibration and voltage and temperature tracking for reliable operation at high frequency
- Free IP and software tools for rapid integration
Who Should View
- FPGA and ASIC developers
- Engineering and technical managers
- System architects
Drawing
All participants who attend this net seminar between August 22, 2007 and September 12, 2007, and complete the post-presentation survey, will be entered into the drawing for a chance to win an Epson P-2000 Multimedia Storage Viewer (US$500 value)!
Presenters
Paul Evans
Product Marketing Manager, ALTERA CORPORATION
Paul Evans is the Product Marketing Manager responsible for Altera’s Stratix III FPGAs. He joined Altera in 2000 as a Senior Application Engineer. Prior to joining Altera, Mr. Evans was a Technical Services Manager for Ometron Ltd. where he established Ometron’s technical services department. Mr. Evans has also held engineering positions at Image Automation Inc. and Smiths Industries Ltd. He holds a BEng in digital electronic engineering from the University of Kent at Canterbury in England.
