Altera and Aldec: Better Verification with High-Reliability DO-254 Compliance Verification Toolset
Webinar Date/Time: Wednesday, September 24, 2008, 11:00 AM PDT
Today's DO-254 Challenge: Verifying the entire FPGA design in hardware while tracing the output results back to the original design requirements (section 6.2 of specification) is a challenge with today's DO-254 level A & B verification solutions.
View this webinar to learn:
- How to use a world-class HDL simulation tool suite with an in-hardware simulation system that supports your Altera® FPGA and HardCopy® ASIC target devices
- How to test the entire design with an exhaustive testbench, use the same testbench to achieve 100% functional coverage, and reuse it for in-hardware testing of the target device at-speed
- How to use in-hardware testing to independently assess the outputs of the synthesis, place-and-route, and simulation tools, fulfilling the DO-254 requirements for tool assessment of these tools
The Altera and Aldec/DO254-CTS provides support for the "Design Assurance Guidance for Airborne Electronic Hardware" (DO-254/ED80) Chapter 6.2 "Verification Process" and Chapter 11.4 "Tool Assessment and Qualification Process," Levels A-D.
Presenters:
Zbyszek Zalewski
GM Hardware Products Division, Aldec, Inc.
Paul Quintana
Sr. Technical Marketing Manager, Altera Corporation
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