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Head End/Delivery Center

Home > End Markets > Broadcast > Head End/Delivery Center

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Along with the feature-rich architecture of Altera's Stratix® and Arria® series FPGAs, Altera and its partners offer reference designs and intellectual property (IP) for implementing various head-end solutions. These solutions include video capture interfaces, high-performance digital signal processing (DSP) functions, memory controllers, and video processing and compression functions. The solutions (see Table 1) provide flexibility, performance, integration, and design resources that are not available from any competitor's solution.

Table 1. Altera's Solutions for Head End/Delivery Center
Development Environment Solution Baseband IF RF
SDI

MegaCore® function

Check Mark

   
ASI

MegaCore function

     
H.264/MPEG2 Encoder

Contact Altera® Sales

Check Mark

   
Memory Interfaces

DDR2, DDR3

Check Mark

Check Mark

Check Mark

Error Corrections

MegaCore function

Check Mark

   
FIR

MegaCore function

Check Mark

Check Mark

Check Mark

Multichannel J.83 A/B/C, DVB-S1, and DVB-T

MegaCore function

Check Mark

Check Mark

Check Mark

Development Kits

Stratix III DSP Development Kit

Check Mark

Check Mark

Check Mark

Cyclone® III DSP Development Kit

Check Mark

Check Mark

Check Mark

Stratix II DSP
Development Kit

Check Mark

Check Mark

Check Mark

Stratix IV GX FPGA
Development Kit

Check Mark

Check Mark

Check Mark

Related Links

  • Stratix Series FPGAs
  • Arria Series FPGAs
  • Cyclone Series FPGAs
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