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WiMAX Channel Card Solutions

In addition to high-performance and cost-effective devices, and easy-to-use software tools, Altera provides a wide array of baseband intellectual property (IP) and reference designs to accelerate the design of WiMAX channel cards. Figure 1 shows an overview of Altera’s IP and reference designs that are available today for implementing the IEEE 802.16e-2005 scalable orthogonal frequency-division multiple access (OFDMA) PHY in WiMAX base stations.

Figure 1. Altera’s IEEE 802.16e-2005 Scalable OFDMA Reference Design Blocks

Figure 1. Altera's IEEE 802.16e-2005 Scalable OFDMA Reference Design Blocks
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Notes to Figure 1:

  1. FEC = forward error correction
  2. IFFT = inverse fast Fourier transform

As shown in the Figure 1, Altera’s WiMAX building blocks include bit-level and OFDMA symbol-level processing blocks. Examples of bit-level processing blocks offered by Altera include reference designs for symbol mapping for QPSK, 16QAM, and 64QAM modulations and other blocks such as FEC encoding and decoding. Altera offers a complete portfolio of FEC cores including Reed-Solomon and Viterbi MegaCore® functions, as well as turbo convolutional and turbo product cores from Altera® Megafunctions Partner Program (AMPPSM) partner TurboConcept. The symbol-level reference designs from Altera include advanced functions such as OFDMA subchannelization and desubchannelization, as well as FFT and IFFT MegaCore functions that support 128 to 2,048 points for scalable channel bandwidths from 1.25 to 20 MHz. Other symbol-level block reference designs include rangingchannel estimation, and channel equalization.

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