Literature: Cyclone II Devices
The Cyclone® II Device Handbook is comprised of the Cyclone II family data sheet along with detailed information on how to use Cyclone II features. Other topics include PCB layout guidelines, memory, configuration, and design considerations. To view the entire handbook, click the Cyclone II Device Handbook (All Sections) link below.
Get more information on Cyclone II Pin-Outs.
Check the Knowledge Database for Known Issues with the Cyclone II Handbook.
Section I.
Cyclone II Device Family Data Sheet (2,206 KB)
- Chapter 1. Introduction (ver 3.2, Feb 2008, 167 KB)
- Chapter 2. Cyclone II Architecture (ver 3.1, Feb 2007, 628 KB)
- Chapter 3. Configuration & Testing (ver 2.2, Feb 2007, 141 KB)
- Chapter 4. Hot Socketing & Power-On Reset (ver 3.1, Feb 2007, 124 KB)
- Chapter 5. DC Characteristics and Timing Specifications (ver 4.0, Feb 2008, 1,384 KB)
- Chapter 6. Reference & Ordering Information (ver 1.4, Feb 2007, 84 KB)
Section II.
Clock Management (428 KB)
Section III.
Memory (632 KB)
Section IV.
I/O Standards (672 KB)
Section V.
Digital Signal Processing (DSP) (158 KB)
Section VI.
Configuration & Testing (855 KB)
Section VII.
PCB Layout Guidelines (1,201 KB)
Related Documentation by Document Types
Data Sheets
User Guides
- DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 1,972 KB)
- Cyclone II FPGA Starter Development Kit User Guide (ver 1.0.0, Mar 2007, 3,912 KB)
- Cyclone II PowerPlay Early Power Estimator User Guide (ver 1.1, May 2006, 1,200 KB)
- PCI Development Kit, Cyclone II Edition Getting Started User Guide (ver 1.0, May 2005, 555 KB)
Manuals
Application Notes
- AN 114: Designing with High-Density BGA Packages for Altera Devices (ver 5.1, Dec 2007, 574 KB)
- AN477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 1.0, Nov 2007, 260 KB)
- AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices (ver 1.3, Feb 2007, 178 KB)
- AN 366: Understanding I/O Output Timing for Altera Devices (ver 1.0, Jul 2006, 311 KB)
- AN 361: Interfacing DDR & DDR2 SDRAM With Cyclone II Devices (ver 1.3, Jun 2006, 379 KB)
- AN 379: Active Serial Memory Interface Controller Reference Design (ver 1.0, Mar 2005, 190 KB)
Design Files ( 10 KB)
- AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function (ver 1.1, Dec 2004, 62 KB)
- AN 306: Implementing Multipliers in FPGA Devices (ver 3.0, Jul 2004, 732 KB)
White Papers
Brochures
Selector Guides
Errata Sheets
Technical Briefs
Product Overview
Related Documentation by Solutions
- Altera Enhanced COTS PLD Initiative (ver 1.0, Sep 2007, 138 KB)
- Altera in Portable Entertainment (ver 1.0, May 2007, 225 KB)
- Automotive-Grade Device Handbook (ver 1.0, Feb 2008, 843 KB)
- Altera in portable entertainment (ver 2.0, Dec 2007, 195 KB)
- Industrial Ethernet solutions from Altera (ver 1.0, Mar 2007, 114 KB)
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Literature
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