Literature: Cyclone II Devices

The Cyclone^® II Device Handbook is comprised of the Cyclone II family data sheet along with detailed information on how to use Cyclone II features. Other topics include PCB layout guidelines, memory, configuration, and design considerations. To view the entire handbook, click the Cyclone II Device Handbook (All Sections) link below.

Get more information on Cyclone II Pin-Outs.

Check the Knowledge Database for Known Issues with the Cyclone II Handbook.

Cyclone II Device Handbook (All Sections) (6 MB)

Section I. Cyclone II Device Family Data Sheet (2 MB)

• Chapter 1. Introduction (ver 3.2, Feb 2008, 168 KB)
• Chapter 2. Cyclone II Architecture (ver 3.1, Feb 2007, 628 KB)
• Chapter 3. Configuration & Testing (ver 2.2, Feb 2007, 141 KB)
• Chapter 4. Hot Socketing & Power-On Reset (ver 3.1, Feb 2007, 125 KB)
• Chapter 5. DC Characteristics and Timing Specifications (ver 4.0, Feb 2008, 1 MB)
• Chapter 6. Reference & Ordering Information (ver 1.4, Feb 2007, 85 KB)

Section II. Clock Management (428 KB)

• Chapter 7. PLLs in Cyclone II Devices (ver 3.1, Feb 2007, 417 KB)

Section III. Memory (633 KB)

• Chapter 8. Cyclone II Memory Blocks (ver 2.4, Feb 2008, 379 KB)
• Chapter 9. External Memory Interfaces (ver 3.1, Feb 2007, 333 KB)

Section IV. I/O Standards (673 KB)

• Chapter 10. Selectable I/O Standards in Cyclone II Devices (ver 2.4, Feb 2008, 461 KB)
• Chapter 11. High-Speed Differential Interfaces in Cyclone II Devices (ver 2.2, Feb 2007, 281 KB)
• Readme File for x8 Mode & LVDS SERDES
• Reference Design for x8 Mode & LVDS SERDES

Section V. Digital Signal Processing (DSP) (159 KB)

• Chapter 12. Embedded Multipliers in Cyclone II Devices (ver 1.2, Feb 2007, 152 KB)

Section VI. Configuration & Testing (855 KB)

• Chapter 13. Configuring Cyclone II Devices (ver 3.1, Feb 2007, 678 KB)
• Chapter 14. IEEE 1149.1 (JTAG) Boundary Scan Testing for Cyclone II Devices (ver 2.1, Feb 2007, 258 KB)

Section VII. PCB Layout Guidelines (1 MB)

• Chapter 15. Package Information for Cyclone II Devices (ver 2.3, Feb 2007, 1 MB)

Related Documentation by Document Types

Data Sheets

• Altera Device Package Information Data Sheet (ver 16.0, Dec 2009, 12 MB)

User Guides

• DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 2 MB)
• Cyclone II FPGA Starter Development Kit User Guide (ver 1.0.0, Mar 2007, 4 MB)
• Cyclone II PowerPlay Early Power Estimator User Guide (ver 1.1, May 2006, 1 MB)
• PCI Development Kit, Cyclone II Edition Getting Started User Guide (ver 1.0, May 2005, 555 KB)

Manuals

• Cyclone II FPGA Starter Development Board Reference Manual (ver 1.0, Oct 2006, 7 MB)
• Cyclone II EP2C35 PCI Development Board Reference Manual (ver 1.0, May 2005, 525 KB)

Application Notes

• AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
• AN 479: Design Guidelines for Implementing LVDS Interfaces in Cyclone Series Devices (ver 1.1, Jun 2009, 435 KB)
• AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices (ver 1.4, Jul 2008, 371 KB)
• AN 114: Designing with High-Density BGA Packages for Altera Devices (ver 5.1, Dec 2007, 574 KB)
• AN 366: Understanding I/O Output Timing for Altera Devices (ver 1.0, Jul 2006, 311 KB)
• AN 361: Interfacing DDR & DDR2 SDRAM With Cyclone II Devices (ver 1.3, Jun 2006, 380 KB)
• AN 379: Active Serial Memory Interface Controller Reference Design (ver 1.0, Mar 2005, 191 KB)
Design Files ( 11 KB)
• AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function (ver 1.1, Dec 2004, 63 KB)
• AN 306: Implementing Multipliers in FPGA Devices (ver 3.0, Jul 2004, 733 KB)

White Papers

• A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras (ver 1.2, Oct 2008, 761 KB)
• Single-Resistor RSDS Solution for Cyclone II Devices (ver 1.0, Oct 2005, 180 KB)
• Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)
• FPGAs for High-Performance DSP Applications (ver 1.1, May 2005, 119 KB)

Selector Guides

• Altera Product Catalog (ver 7.4, Mar 2010, 3 MB)
• Cyclone FPGA Series Package & I/O Matrix (ver 1.0, Aug 2006, 50 KB)

Errata Sheets

• Cyclone II FPGA Family Errata Sheet (ver 1.3, Mar 2006, 265 KB)
• DSP Development Kit, Cyclone II Edition Errata Sheet v1.0 (ver 1.0, Sep 2005, 65 KB)

Technical Briefs

• TB 088: Extended Temperature Support for Cyclone II, Cyclone III, and MAX II Devices (ver 1.1, Oct 2008, 65 KB)

Product Overview

• Altera Enhanced COTS PLD Initiative (ver 1.1, Jul 2008, 122 KB)
• Altera in Portable Entertainment (ver 1.0, May 2007, 226 KB)
• Industrial Ethernet solutions from Altera (ver 4.1, Jun 2009, 264 KB)
• Altera in portable entertainment (ver 2.0, Dec 2007, 196 KB)

Related Documentation by Solutions