Documentation: HardCopy IV Devices

HardCopy IV Device Handbook (13 MB)

HardCopy IV Device Handbook, Volume 1: Device Interfaces and Integration (ver 2.4, Mar 2012, 4 MB)

Section I. Device Core

Chapter 1. HardCopy IV Device Family Overview (ver 2.3, Jan 2011, 320 KB)
Chapter 2. Logic Array Block and Adaptive Logic Module Implementation in HardCopy IV Devices (ver 1.1, Jan 2011, 140 KB)
Chapter 3. DSP Block Implementation in HardCopy IV Devices (ver 1.1, Jan 2011, 165 KB)
Chapter 4. TriMatrix Embedded Memory Blocks in HardCopy IV Devices (ver 2.2, Jan 2011, 150 KB)
Chapter 5. Clock Networks and PLLs in HardCopy IV Devices (ver 2.3, Mar 2012, 186 KB)

Section II. I/O Interfaces

Chapter 6. I/O Features for HardCopy IV Devices (ver 2.3, Mar 2012, 559 KB)
Chapter 7. External Memory Interfaces in HardCopy IV Devices (ver 2.3, Mar 2012, 1 MB)
Chapter 8. High-Speed Differential I/O Interfaces and DPA in HardCopy IV Devices (ver 2.2, Jan 2011, 826 KB)

Section III. Hot Socketing and Testing

Chapter 9. Hot Socketing and Power On-Reset in HardCopy IV Devices (ver 1.2, Mar 2012, 255 KB)
Chapter 10. IEEE 1149.1 (JTAG) Boundary Scan Testing in HardCopy IV Devices (ver 2.1, Jan 2011, 142 KB)

Section IV. Power and Thermal Management

Chapter 11. Power Supply and Temperature Sensing Diode in HardCopy IV Devices (ver 1.3, Mar 2012, 181 KB)

HardCopy IV Device Handbook, Volume 2 (ver 2.3, Mar 2012, 2 MB)

Section I. HardCopy IV Design Flow and Prototyping with Stratix IV Devices

Chapter 1. HardCopy IV Design Flow Using the Quartus II Software (ver 2.2, Jan 2011, 746 KB)
Chapter 2. HardCopy Design Center Implementation Process (ver 1.1, Jan 2011, 218 KB)
Chapter 3. Mapping Stratix IV Device Resources to HardCopy IV Devices (ver 2.3, Mar 2012, 313 KB)
Chapter 4. Matching Stratix IV Power and Configuration Requirements with HardCopy IV Devices (ver 2.2, Mar 2012, 510 KB)

HardCopy IV Device Handbook, Volume 3 (ver 1.2, Mar 2012, 7 MB)

Section I. Transceiver Architecture

Chapter 1. Transceiver Architecture in HardCopy IV Devices (ver 1.1, Jan 2011, 4 MB)
Chapter 2. HardCopy IV GX Dynamic Reconfiguration (ver 2.1, Mar 2012, 2 MB)
Chapter 3. HardCopy IV GX ALTGX_RECONFIG Megafunction User Guide (ver 1.2, Mar 2012, 444 KB)

HardCopy IV Device Handbook, Volume 4: Datasheet and Addendum (ver 2.2, Jun 2012, 954 KB)

Section I. HardCopy IV Device Datasheet

Chapter 1. DC and Switching Characteristics of HardCopy IV Devices (ver 2.1, Jan 2012, 590 KB)

HardCopyIV IO Timing Spreadsheet

Chapter 2. Addendum: Extended Temperature Range for HardCopy IV Devices (ver 1.0, Mar 2012, 142 KB)

Related Documentation

External Memory Interfaces

AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs (ver 2.0, Mar 2010, 547 KB)
     altmemphy_ext_dll.zip (48 KB)
     altmemphy_int_dll.zip (47 KB)
     static_dll.zip (18 KB)
External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)

Power and Thermal Management

Stratix III, Stratix IV, Stratix V, HardCopy III and HardCopy IV PowerPlay Early Power Estimator (ver 12.1sp1, Apr 2013, 7 KB)
PowerPlay Early Power Estimator User Guide (1 MB)
Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
PowerPlay Early Power Estimator User Guide (ver 7.1, Jul 2012, 1 MB)

I/O Interfaces, Protocols and Signal Integrity

Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
AN 635: Implementing SATA and SAS Protocols in Altera Devices (ver 1.1, Sep 2012, 567 KB)
Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)
PCI Express hard intellectual property solutions from Altera (ver 2.0, Jul 2009, 165 KB)

DSP

40-nm Stratix IV FPGAs and HardCopy IV ASICs (ver 1.1, Sep 2008, 372 KB)
Altera Product Catalog (ver 12.1, Feb 2013, 2 MB)
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)

Design Guidelines

AN 311: ASIC-to-FPGA Design Methodology and Guidelines (ver 3.1, Apr 2009, 286 KB)
AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
AN 649: Design Guidelines for HardCopy IV GX Devices (ver 1.0, Dec 2011, 712 KB)
AN 658: Best Design Practices for HardCopy Devices (ver 1.1, Jul 2012, 799 KB)

Development Kits

Altera Product Catalog (ver 12.1, Feb 2013, 2 MB)

End Applications

Designing Basestation Channel Cards with FPGAs (ver 4.1, Mar 2012, 131 KB)
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
Designing Remote Radio Head Applications with FPGAs (ver 3.0, Feb 2012, 381 KB)
DO-254-certifiable IP cores (ver 2.0, Nov 2008, 119 KB)
FPGA companion chip solutions from Altera (ver 2.0, Nov 2010, 674 KB)
Implementing Next-Generation Passive Optical Network Designs with FPGAs (ver 1.2, May 2012, 498 KB)
Wireless End Market Solutions (ver 4.1, Jul 2010, 144 KB)

General Device Documentation

40-nm Stratix IV FPGAs and HardCopy IV ASICs (ver 1.1, Sep 2008, 372 KB)
Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints (ver 1.2, Feb 2009, 459 KB)
Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices (ver 1.1, Feb 2009, 377 KB)

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