Package information includes the ordering code reference, package acronym, leadframe material, lead finish (plating), JEDEC outline reference, lead coplanarity, weight, moisture sensitivity level, and other special information. The thermal resistance information includes device pin count, package name, and resistance values.
|Stratix Series||Arria Series||Cyclone Series||MAX Series||HardCopy Series||Configuration Devices|
|Stratix V||Arria V||Cyclone V||MAX V||HardCopy IV||Serial Configuration Devices|
|Stratix IV||Arria II||Cyclone IV||MAX II||HardCopy III||Quad Configuration Devices|
|Stratix III||Cyclone III|
For other devices not listed in the table above, please see the Devices Packaging Datasheet.
Search using Package Drawing Search.
For other related packaging technical information, refer to the following literature.
|Title||Release Date||File Size|
| AN659: Thermal Management and Mechanical Handling for Lidless Flip Chip Ball-Grid Array
(This application note provides guidance on thermal management and mechanical handling of lidless flip chip ball-grid array (FCBGA) for Altera devices. )
|Mar 2012||980 KB|
|AN 353: SMT Board Assembly Process Recommendations||Oct 2011||258 KB|
|AN 114: Designing with High-Density BGA Packages for Altera Devices||Dec 2007||574 KB|
|AN 71: Guidelines for Handling J-Lead, QFP, BGA, FBGA, and Lidless Devices||Jan 2011||730 KB|
|Challenges in Manufacturing Reliable Lead-Free and RoHS-Compliant Components||Aug 2010||385 KB|