Literature: SOPC Builder

This page provides links to the SOPC Builder volume of the Quartus^® II Development Software Handbook and other documents related to SOPC Builder. The SOPC Builder volume provides an introduction to all SOPC Builder features, complete usage reference, and tutorials for building custom systems. Click the links below to view and download the entire volume, or any individual section or chapter. For more SOPC Builder support, visit the SOPC Builder Support web page.

Volume 4: SOPC Builder (ver 9.0, Mar 2009, 2 MB)

Section I. SOPC Builder Features (1 MB)

• Chapter 1. Introduction to SOPC Builder (ver 9.0.0, Mar 2009, 176 KB)
• Chapter 2. System Interconnect Fabric for Memory-Mapped Interfaces (ver 9.0.0, Mar 2009, 289 KB)
• Chapter 3. System Interconnect Fabric for Streaming Interfaces (ver 9.0.0, Mar 2009, 110 KB)
• Chapter 4. SOPC Builder Components (ver 9.0.0, Mar 2009, 186 KB)
• Chapter 5. Using SOPC Builder with the Quartus II Software (ver 9.0.0, Mar 2009, 155 KB)
• Chapter 6. Component Editor (ver 9.0.0, Mar 2009, 155 KB)
• Chapter 7. Component Interface Tcl Reference (ver 9.0.0, Mar 2009, 372 KB)
• Chapter 8. Archiving SOPC Builder Projects (ver 9.0.0, Mar 2009, 94 KB)

Section II. Building Systems with SOPC Builder (1 MB)

• Chapter 9. SOPC Builder Memory Subsystem Development Walkthrough (ver 9.0.0, Mar 2009, 412 KB)
• Chapter 10. SOPC Builder Component Development Walkthrough (ver 9.0.0, Jul 2009, 192 KB)
• Altera Avalon Checksum

Section III. Interconnect Components (1 MB)

• Chapter 11. Avalon Memory-Mapped Bridges (ver 9.0.0, Mar 2009, 477 KB)
• Chapter 12. Avalon Streaming Interconnect Components (ver 9.0.0, Mar 2009, 190 KB)

Volume 5: Embedded Peripherals (ver 9.0, Mar 2009, 4 MB)

Section I. Off-Chip Interface Peripherals (2 MB)

• Chapter 1. SDRAM Controller Core (ver 9.0.0, Mar 2009, 253 KB)
• Chapter 2. CompactFlash Core (ver 9.0.0, Mar 2009, 115 KB)
• Chapter 3. Common Flash Interface Controller Core (ver 9.0.0, Mar 2009, 107 KB)
• Chapter 4. EPCS Device Controller Core (ver 9.0.0, Mar 2009, 115 KB)
• Chapter 5. JTAG UART Core (ver 9.0.0, Mar 2009, 214 KB)
• Chapter 6. UART Core (ver 9.0.0, Mar 2009, 243 KB)
• Chapter 7. SPI Core (ver 9.0.0, Mar 2009, 202 KB)
• Chapter 8. Optrex 16207 LCD Controller Core (ver 9.0.0, Mar 2009, 97 KB)
• Chapter 9. PIO Core (ver 9.0.0, Mar 2009, 139 KB)
• Chapter 10. Avalon-ST JTAG Interface Core (ver 9.0.0, Mar 2009, 139 KB)
• Chapter 11. Avalon-ST Serial Peripheral Interface Core (ver 9.0.0, Mar 2009, 196 KB)
• Chapter 12. SPI Slave/JTAG to Avalon Master Bridge Cores (ver 9.0.0, Mar 2009, 211 KB)
• Chapter 13. PCI Lite Core (ver 9.0.0, Mar 2009, 345 KB)

Section II. On-Chip Storage Peripherals (2 MB)

• Chapter 14. Avalon-ST Single Clock and Dual Clock FIFO Cores (ver 9.0.0, Mar 2009, 193 KB)
• Chapter 15. On-Chip FIFO Memory Core (ver 9.0.0, Mar 2009, 228 KB)
• Chapter 16. Avalon-ST Multi-Channel Shared Memory FIFO Core (ver 9.0.0, Mar 2009, 200 KB)

Section III. Transport and Communication (1 MB)

• Chapter 17. Avalon Streaming Channel Multiplexer and Demultiplexer Cores (ver 9.0.0, Mar 2009, 129 KB)
• Chapter 18. Avalon-ST Bytes to Packets and Packets to Bytes Converter Cores (ver 9.0.0, Mar 2009, 165 KB)
• Chapter 19. Avalon Packets to Transactions Converter Core (ver 9.0.0, Mar 2009, 132 KB)
• Chapter 20. Avalon-ST Round Robin Scheduler Core (ver 9.0.0, Mar 2009, 132 KB)

Section IV. Peripherals (2 MB)

• Chapter 21. Scatter-Gather DMA Controller Core (ver 9.0.0, Mar 2009, 283 KB)
• Chapter 22. DMA Controller Core (ver 9.0.0, Mar 2009, 190 KB)
• Chapter 23. Video Sync Generator and Pixel Converter Cores (ver 9.0.0, Mar 2009, 144 KB)
• Chapter 24. Interval Timer Core (ver 9.0.0, Mar 2009, 191 KB)
• Chapter 25. System ID Core (ver 9.0.0, Mar 2009, 85 KB)
• Chapter 26. Mutex Core (ver 9.0.0, Mar 2009, 110 KB)
• Chapter 27. Mailbox Core (ver 9.0.0, Mar 2009, 116 KB)

Section V. Test and Debug Peripherals (1 MB)

• Chapter 28. Cyclone III Remote Update Controller Core (ver 9.0.0, Mar 2009, 138 KB)
• Chapter 29. Performance Counter Core (ver 9.0.0, Mar 2009, 170 KB)
• Chapter 30. Avalon Streaming Test Pattern Generator and Checker Cores (ver 9.0.0, Mar 2009, 265 KB)

Section VI. Clock Control Peripherals (1 MB)

• Chapter 31. PLL Core (ver 9.0.0, Mar 2009, 147 KB)

Embedded Design Handbook (ver 2.3, Apr 2009, 2 MB)

Section I. Introduction (293 KB)

• Chapter 1. First-Time Designer's Guide (ver 2.1, Jan 2009, 293 KB)

Section II. Nios II Software Development (1 MB)

• Chapter 2. Developing Nios II Software (ver 1.1, Jun 2008, 478 KB)
• Chapter 3. Debugging Nios II Designs (ver 1.2, Apr 2009, 436 KB)
• Chapter 4. Nios II Command-Line Tools (ver 2.1, Apr 2009, 152 KB)
• Chapter 5. Optimizing Nios II C2H Compiler Results (ver 1.1, Jun 2008, 468 KB)
• edh_c2h_optimization_design_files.zip

Section III. System Level Design (1 MB)

• Chapter 6. Avalon Memory-Mapped Design Optimizations (ver 1.1, Jun 2008, 332 KB)
• Chapter 7. Memory System Design (ver 1.1, Jun 2008, 198 KB)
• Chapter 8. Hardware Acceleration and Coprocessing (ver 1.1, Jun 2008, 163 KB)
• Chapter 9. Verification and Board Bring-Up (ver 1.2, Nov 2008, 240 KB)
• Chapter 10. Interfacing an External Processor to an Altera FPGA (ver 1.0, Feb 2009, 549 KB)

Related Documentation

User Guides

• System Console User Guide (ver 1.2, Mar 2009, 215 KB)
Design Files for System Console ( 206 KB)
• Nios II Custom Instruction User Guide (ver 1.5, Jun 2008, 701 KB)
Design Files for Nios II Custom Instruction User Guide ( 19 KB)

Application Notes

• AN 532: An SOPC Builder PCI Express Design with GUI Interface (ver 1.0, Jun 2008, 285 KB)
Design Files for AN 532 ( 5 MB)
• AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
Design Files for AN 531 ( 1 MB)
• AN 346: Using the Nios II Configuration Controller Reference Designs (ver 1.2, Mar 2009, 793 KB)
• AN458: Alternative Nios II Boot Methods (ver 1.1, Sep 2008, 334 KB)
AN458 design example files ( 37 KB)
• AN 323: Using SignalTap II Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB)
• AN 398: Using DDR/DDR2 SDRAM With SOPC Builder (ver 1.1, Aug 2006, 775 KB)

White Papers

• Comparing IP Integration Approaches for FPGA Implementation (ver 1.1, Feb 2008, 195 KB)

Selector Guides

• Altera Product Catalog (ver 6.1, Feb 2009, 2 MB)

Functional Specifications

• Avalon Interface Specifications (ver 1.2, Apr 2009, 485 KB)
  (Replaces "Avalon Memory-Mapped Interface Specification" and "Avalon Streaming Interface Specification")

Tutorials

• Using Nios II Tightly Coupled Memory Tutorial (ver 1.2, Jul 2009, 210 KB)
Design Files for Tightly Coupled Memory Tutorial ( 15 KB)
• Nios II System Architect Design Tutorial (ver 1.0, Jun 2009, 1 MB)
Nios II Architect Design Tutorial Design Files ( 4 MB)
• Nios II Hardware Development Tutorial (ver 2.5, Oct 2007, 922 KB)
Design Files for Cyclone EP1C12 ( 6 KB)
Design Files for Cyclone EP1C20 ( 6 KB)
Design Files for Cyclone II EP2C35 ( 6 KB)
Design Files for Stratix EP1S10 ( 6 KB)
Design Files for Stratix EP1S10ES ( 6 KB)
Design Files for Stratix EP1S40 ( 6 KB)
Design Files for Stratix II EP2S60 ( 6 KB)
Design Files for Stratix II EP2S60ES ( 6 KB)
Design Files for Stratix II EP2S60 ROHS ( 6 KB)

Product Overview

• Industrial Ethernet solutions from Altera (ver 4.1, Jun 2009, 264 KB)
• 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB)
• Broadcast Solutions Supporting Altera's HD Quality Initiative (HDQI) (ver 2.0, Apr 2008, 2 MB)
• Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 104 KB)