Literature: Stratix IV Devices

BSDL Files

Stratix IV Device Handbook (27 MB)

Volume 1 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 9 MB)

Section I. Device Core (4 MB)

Chapter 1. Stratix IV Device Family Overview (ver 3.0, Nov 2009, 403 KB)
Chapter 2. Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices (ver 3.0, Nov 2009, 558 KB)
Chapter 3. TriMatrix Embedded Memory Blocks in Stratix IV Devices (ver 3.0, Nov 2009, 543 KB)
Chapter 4. DSP Blocks in Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)
Chapter 5. Clock Networks and PLLs in Stratix IV Devices (ver 3.0, Nov 2009, 2 MB)

Section II. I/O Interfaces (4 MB)

Chapter 6. I/O Features in Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)
Chapter 7. External Memory Interfaces in Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)
Chapter 8. High Speed Differential I/O Interfaces with DPA in Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)

Section III. System Integration (2 MB)

Chapter 9. Hot Socketing and Power-On Reset in Stratix IV Devices (ver 3.0, Nov 2009, 144 KB)
Chapter 10. Configuration, Design Security, Remote System Upgrades with Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)
Chapter 11. SEU Mitigation in Stratix IV Devices (ver 3.0, Nov 2009, 169 KB)
Chapter 12. JTAG Boundary Scan Testing in Stratix IV Devices (ver 3.0, Nov 2009, 68 KB)
Chapter 13. Power Management in Stratix IV Devices (ver 3.0, Nov 2009, 106 KB)

Volume 2 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 17 MB)

Section I. Transceiver Architecture (17 MB)

Chapter 1. Stratix IV Transceiver Architecture (ver 4.0, Nov 2009, 7 MB)
Chapter 2. Stratix IV Transceiver Clocking (ver 3.0, Nov 2009, 3 MB)
Chapter 3. Configuring Multiple Protocols and Data Rates in a Transceiver Block (ver 4.0, Nov 2009, 1 MB)
Chapter 4. Reset Control and Power Down (ver 4.0, Nov 2009, 1 MB)
Chapter 5. Stratix IV Dynamic Reconfiguration (ver 3.0, Nov 2009, 3 MB)

Volume 3 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 2 MB)

Section I. Transceiver Configuration Guide (2 MB)

Chapter 1. ALTGX Transceiver Setup Guide (ver 4.0, Nov 2009, 1 MB)
Chapter 2. Transceiver Design Flow Guide (ver 4.0, Nov 2009, 838 KB)
Chapter 3. Stratix IV ALTGX_RECONFIG Megafunction User Guide (ver 3.0, Nov 2009, 409 KB)

Volume 4 - Stratix IV Device Datasheet and Addendum (ver 4.1, Feb 2010, 1,002 KB)

Section I. Stratix IV Device Datasheet and Addendum (939 KB)

Chapter 1. DC and Switching Characteristics (ver 4.1, Feb 2010, 780 KB)

Stratix IV I/O Timing Spreadsheet

Chapter 2. Addendum to the Stratix IV Device Handbook (ver 1.1, Feb 2010, 211 KB)

Related Documentation

External Memory Interfaces

AN 408: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout Guidelines (ver 2.1, Jul 2008, 4 MB)
SII Simulation Example (3 KB)
SIII Simulation Example (3 KB)
AN 435: Using DDR and DDR2 SDRAM with Stratix III and Stratix IV Devices (ver 2.0, Aug 2008, 2 MB)
AN 435 Design Files (3 MB)
AN 436: Using DDR3 SDRAM with Stratix III and Stratix IV Devices (ver 4.0, Nov 2008, 2 MB)
AN 436 Design Files (11 MB)
AN 438: Constraining and Analyzing Timing for External Memory Interfaces in Stratix IV, Stratix III, Arria II GX, and Cyclone III Devices (ver 4.1, May 2009, 976 KB)
SIII_phase_shift (5 KB)
AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
Design Example for AN 461 (3 MB)
AN 520: DDR3 SDRAM Memory Interface Termination and Layout Guidelines (ver 1.1, May 2009, 909 KB)
External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)

Power and Thermal Management

40-nm FPGA Power Management and Advantages (ver 1.2, Dec 2008, 2 MB)
Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
AN 514: Power Optimization in Stratix IV FPGAs (ver 1.0, May 2008, 221 KB)
AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 889 KB)
AN 583: VCC to VCCDPLL Spice Examples (159 KB)
Device-Specific Power Delivery Network (PDN) Tool User Guide (ver 1.0, Nov 2009, 880 KB)
     Power Delivery Network (PDN) Tool for Arria II GX Devices (2 MB)
     Power Deliver Network (PDN) Tool for Stratix IV Devices (2 MB)
     Power Delivery Network (PDN) Tool for Stratix III Devices (2 MB)
Power Delivery Network (PDN) Tool User Guide (ver 2.0, Apr 2009, 763 KB)
Power Delivery Network (PDN) Tool (2 MB)
PowerPlay Early Power Estimator User Guide (ver 1.1, Jan 2010, 600 KB)
PowerPlay Early Power Estimator User Guide For Stratix III and Stratix IV FPGAs (ver 2.0, May 2008, 1 MB)
Stratix III, Stratix IV, HardCopy III and HardCopy IV PowerPlay Early Power Estimator (ver 9.1 SP1, Jan 2010, 7 KB)
PowerPlay Early Power Estimator User Guide For Stratix III and Stratix IV FPGAs (600 KB)
Voltage Regulator Selection for FPGAs (ver 1.0, Nov 2008, 306 KB)

I/O Interfaces, Protocols and Signal Integrity

AN 456: PCI Express High Performance Reference Design (ver 1.2, Aug 2009, 379 KB)
AN 528: PCB Dielectric Material Selection and Fiber Weave Effect on High-Speed Channel Routing (ver 1.0, May 2008, 1 MB)
AN 529: Via Optimization Techniques for High-Speed Channel Designs (ver 1.0, May 2008, 690 KB)
AN 530: Optimizing Impedence Discontinuity Caused by Surface Mount Pads for High-Speed Channel Designs (ver 1.0, May 2008, 208 KB)
PCI Express Compiler User Guide (ver 9.1 SP1, Feb 2010, 4 MB)
Transceiver Poster (ver 1.0, Feb 2009, 191 KB)
Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
AN 454: Implementing PLL Reconfiguration in Stratix III and Stratix IV Devices (ver 2.0, Dec 2009, 868 KB)
Design Examples 1 (412 KB)
Design Examples 2 (236 KB)
AN 520: DDR3 SDRAM Memory Interface Termination and Layout Guidelines (ver 1.1, May 2009, 909 KB)
AN 553: Debugging Transceivers (ver 1.1, Dec 2009, 1 MB)
AN 553: Design Files (874 KB)
AN 570: Implementing the 40G/100G Ethernet Protocol in Stratix IV Devices (ver 1.1, Dec 2009, 1 MB)
(Not applicable when designing with Stratix IV GT engineering sample devices)
AN 571: Implementing the SERDES Framer Interface Level 5 (SFI-5.1) Protocol in Stratix IV Devices (ver 1.0, Jun 2009, 549 KB)
AN 572: Implementing the Scalable SERDES Framer Interface (SFI-S) Protocol in Stratix IV GT Devices (ver 2.0, Jan 2010, 284 KB)
(Not applicable when designing with Stratix IV GT engineering sample devices)
AN 573: Implementing the Interlaken Protocol in Stratix IV Transceivers (ver 1.1, Dec 2009, 768 KB)
(Not applicable when designing with Stratix IV GX and Stratix IV GT engineering sample devices)
AN 577: Recommended Protocol Configurations for Stratix IV GX FPGAs (ver 2.0, Dec 2009, 753 KB)
AN 578: Manual Placement of CMU PLLs and ATX PLLs in Stratix IV GX and GT Devices (ver 1.0, May 2009, 1 MB)
AN 580: Achieving Timing Closure in Basic (PMA Direct) Functional Mode (ver 2.0, Feb 2010, 423 KB)
AN580_scripts.zip (17 KB)
Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
Stratix IV Early SSN Estimator (615 KB)
PCI Express hard intellectual property solutions from Altera (ver 2.0, Jul 2009, 165 KB)
Triple Speed Ethernet MegaCore Function User Guide (ver 9.1, Nov 2009, 2 MB)
Understanding 40-nm FPGA Solutions for SATA/SAS (ver 1.3, Mar 2009, 404 KB)

DSP

40-nm Stratix IV FPGAs and HardCopy IV ASICs (ver 1.1, Sep 2008, 372 KB)
Altera Product Catalog (ver 7.4, Mar 2010, 3 MB)
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)

Design Guidelines

AN 519: Stratix IV Design Guidelines (ver 1.1, May 2009, 493 KB)
AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
Design Example for AN 461 (3 MB)
AN 520: DDR3 SDRAM Memory Interface Termination and Layout Guidelines (ver 1.1, May 2009, 909 KB)
AN 553: Debugging Transceivers (ver 1.1, Dec 2009, 1 MB)
AN 553: Design Files (874 KB)
AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 889 KB)
AN 583: VCC to VCCDPLL Spice Examples (159 KB)
Avoiding PCB Design Mistakes in FPGA-Based Systems (ver 1.0, Mar 2009, 935 KB)
(Taray Inc.)
Stratix IV GX and Stratix IV E Device Family Pin Connection Guidelines (ver 1.5, Feb 2010, 606 KB)

PCB Layout and Packaging

AN 553: Debugging Transceivers (ver 1.1, Dec 2009, 1 MB)
AN 553: Design Files (874 KB)

Development Kits

SDI HSMC Reference Manual (ver 1.0, Jul 2009, 1 MB)
Transceiver Signal Integrity Development Kit, Stratix IV GT Edition Reference Manual (ver 1.0, Dec 2009, 1 MB)
Altera Product Catalog (ver 7.4, Mar 2010, 3 MB)
Audio Video Development Kit, Stratix IV GX Edition User Guide (ver 2.0, Nov 2009, 1 MB)
Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
Stratix IV E FPGA Development Board Reference Manual (ver 1.1, Mar 2010, 2 MB)
Stratix IV E FPGA Development Kit User Guide (ver 1.0, Nov 2009, 943 KB)
Stratix IV GX FPGA Development Board Reference Manual (ver 2.0, Nov 2009, 2 MB)
Stratix IV GX FPGA Development Kit User Guide (ver 2.0, Nov 2009, 1 MB)
Transceiver Signal Integrity Development Kit, Stratix IV GX Edition Reference Manual (ver 2.0, Nov 2009, 1 MB)
Transceiver Signal Integrity Kit, Stratix IV GT Edition User Guide (ver 1.0, Jan 2010, 403 KB)

End Applications

40-nm FPGAs and the Defense Electronic Design Organization (ver 1.0, Jul 2008, 313 KB)
Altera’s floating point solutions for military applications (ver 1.1, May 2009, 150 KB)
Anti-Tamper Capabilities in FPGA Designs (ver 1.0, Jul 2008, 310 KB)
Assessing FPGA DSP Benchmarks at 40 nm (ver 1.0, Mar 2009, 463 KB)
Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
Designing base transceiver station (BTS) channel cards with transceiver FPGAs and ASICs (ver 1.0, Feb 2009, 141 KB)
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
Designing remote radio head applications with transceiver FPGAs (ver 1.0, Feb 2009, 164 KB)
DO-254 Support for FPGA Design Flows (ver 1.0, Jul 2008, 91 KB)
DO-254-certifiable IP cores (ver 2.0, Nov 2008, 119 KB)
Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Jun 2009, 139 KB)
FPGA companion chip solutions from Altera (ver 1.0, Nov 2009, 283 KB)
FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance (ver 1.1, Jun 2009, 303 KB)
GPON solutions from Altera (ver 2.0, Feb 2009, 143 KB)
HardCopy ASICs (ver 1.1, Jul 2008, 277 KB)
Military Benefits of the Managed Risk Process at 40 nm (ver 1.0, Jul 2008, 993 KB)
Military Productivity Factors in Large FPGA Designs (ver 1.0, Jul 2008, 443 KB)
Optical Transport Networks for 100G Implementation in FPGAs (ver 1.0, Oct 2009, 1 MB)
Power-Optimized Solutions for Telecom Applications (ver 1.0, Jan 2009, 594 KB)
Remote Radio Heads and the Evolution Towards 4G Networks (ver 1.1, Feb 2009, 718 KB)
(Radiocomp)

General Device Documentation

40-nm Stratix IV FPGAs and HardCopy IV ASICs (ver 1.1, Sep 2008, 372 KB)
40-nm FPGAs: Architecture and Performance Comparison (ver 1.0, Dec 2008, 2 MB)
Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, May 2008, 3 MB)
FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, Apr 2009, 3 MB)
HardCopy ASICs (ver 1.1, Jul 2008, 277 KB)
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers (ver 1.3, Mar 2009, 932 KB)
Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices (ver 1.1, Feb 2009, 377 KB)
Using 10-Gbps Transceivers in 40G/100G Applications (ver 1.3, Feb 2010, 1 MB)

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