Stratix V Device Overview (ver 2013.05.06, May 2013, 563 KB)
Stratix V Device Datasheet (ver 2.7, May 2013, 1 MB)
Stratix V Device Handbook (4 MB)
Stratix V Device Handbook, Volume 1: Device Interfaces and Integration (ver 2013.05.10, May 2013, 2 MB)
Stratix V Device Handbook, Volume 2: Transceivers (ver 2013.05.06, May 2013, 2 MB)
Related Documentation
External Memory Interfaces
- Boosting System Performance with External Memory Solutions (ver 1.0, Jun 2010, 404 KB)
Power and Thermal Management
- Stratix III, Stratix IV, Stratix V, HardCopy III and HardCopy IV PowerPlay Early Power Estimator (ver 12.1sp1, Apr 2013, 7 KB)

PowerPlay Early Power Estimator User Guide (1 MB)
- An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28 nm FPGAs (ver 1.0, Mar 2013, 331 KB)
(BDTI)
- Delivering the Right Power and Performance for 28 nm High-End FPGAs (ver 1.0, Dec 2012, 427 KB)
- Device-Specific Power Delivery Network (PDN) Tool User Guide for Other Supported Device Families (ver 1.0, Dec 2012, 2 MB)
Power Delivery Network (PDN) Tool Version 12.1 for Stratix V, Arria V, Arria II GZ, Cyclone V, and Cyclone IV Devices (4 MB)
- Meeting the Low Power Imperative at 28 nm (ver 2.1, Sep 2012, 1 MB)
- PowerPlay Early Power Estimator User Guide (ver 7.1, Jul 2012, 1 MB)
- Reducing Power Consumption and Increasing Bandwidth on 28-nm FPGAs (ver 2.0, Mar 2012, 2 MB)
I/O Interfaces, Protocols and Signal Integrity
- AN 456: PCI Express High Performance Reference Design (ver 1.6, Feb 2013, 547 KB)
- Stratix V Hard IP for PCI Express User Guide (ver 1.5, May 2013, 7 MB)

- AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs (ver 2.1, Dec 2012, 745 KB)
- AN 664: Using the Stratix V Reconfiguration Controller to Perform Dynamic Reconfiguration (ver 1.0, Jul 2012, 1,016 KB)
Stratix V Reconfiguration Design Example (1 MB)
- AN 668: Serial Digital Interface Reference Design for Stratix V GX and Arria V GX Devices (ver 1.0, Sep 2012, 784 KB)
Arria V GX Design Files (2 MB)
Stratix V GX Design Files (1 MB)
- AN 671: Stratix V Dynamic Transmitter PMA Control for PCI Express (ver 2012.12.19, Dec 2012, 299 KB)
- AN653: Implementing the CPRI Protocol using the Deterministic Latency Transceiver PHY IP Core (ver 2013.02.08, Feb 2013, 2 MB)
an653_Reference_Design_File (346 KB)
- Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
Stratix V Early SSN Estimator (558 KB)
Embedded Memory
- Real-Time Challenges and Opportunities in SoCs (ver 1.1, Mar 2013, 1 MB)
DSP
- Altera Product Catalog (ver 12.1, Feb 2013, 2 MB)
- Accelerating DSP Designs with the Total 28-nm DSP Portfolio (ver 1.1, May 2011, 998 KB)
- Achieving One TeraFLOPS with 28-nm FPGAs (ver 1.0, Sep 2010, 631 KB)
- Altera's 28 nm Device Portfolio (ver 2.0, Oct 2012, 1 MB)
- AN639: Inferring Stratix V DSP Blocks for FIR Filtering Applications (ver 1.0, Feb 2011, 1 MB)
- Implementing FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture (ver 1.0, Sep 2010, 1 MB)
- Versatile Digital QAM Modulator (ver 2.0, Dec 2010, 553 KB)
Device Configuration and Remote System Upgrades
- Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide (ver 2013.05.15, May 2013, 2 MB)

user_led.zip (4 KB)
- FPGA Configuration via Protocol (ver 1.1, May 2011, 814 KB)
Design Guidelines
- AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission (ver 2013.02.15, Feb 2013, 3 MB)
- Achieving SerDes Interoperability on Altera's 28 nm FPGAs Using Introspect ESP (ver 1.0, Mar 2013, 1 MB)
(Introspect)
- AN 625: Stratix V Device Design Guidelines (ver 1.0, Dec 2010, 1 MB)
- AN 644: Migration Between Stratix V GX and Stratix V GT Devices (ver 1.0, May 2011, 270 KB)
- AN 670: Thermal Solutions to Address Height Variation in Stratix V Packages (ver 1.0, Oct 2012, 267 KB)
- AN 681: Stratix V GT Device Design Guidelines (ver 2013.03.29, Mar 2013, 1 MB)

- AN 684: Design Guidelines for 100 Gbps - CFP2 Interface (ver 2013.03.29, Mar 2013, 1,020 KB)

- An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28 nm FPGAs (ver 1.0, Mar 2013, 331 KB)
(BDTI)
- Enhancing Robust SEU Mitigation with 28-nm FPGAs (ver 1.0, Jul 2010, 373 KB)
- High-Speed Link Tuning Using Signal Conditioning Circuitry in Stratix V Transceivers (ver 2013.03.19, Mar 2013, 2 MB)

AN 678 Reference Design Files (1 MB)
- Real-Time Challenges and Opportunities in SoCs (ver 1.1, Mar 2013, 1 MB)
- Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach (ver 1.0, Aug 2012, 669 KB)
PCB Layout and Packaging
- AN 651: PCB Breakout Routing for High-Density Serial Channel Designs Beyond 10 Gbps (ver 1.0, Nov 2011, 2 MB)
- AN659: Thermal Management and Mechanical Handling for Lidless Flip Chip Ball-Grid Array (ver 1.0, Mar 2012, 980 KB)
(This application note provides guidance on thermal management and mechanical handling of lidless flip chip ball-grid array (FCBGA) for Altera devices. )
Development Kits
- 100G Development Kit, Stratix V GX Edition Reference Manual (ver 1.1, Aug 2012, 1 MB)
- Altera Product Catalog (ver 12.1, Feb 2013, 2 MB)
- DSP Development Kit, Stratix V Edition Reference Manual (ver 1.0, Jul 2012, 2 MB)
- Stratix V Advanced Systems Development Board Reference Manual (ver 1.0, Jan 2013, 2 MB)
- Stratix V GX FPGA Development Board Reference Manual (ver 1.3, Jul 2012, 2 MB)
- Transceiver Signal Integrity Development Kit, Stratix V GX Edition Reference Manual (ver 1.1, Jul 2012, 1 MB)
- 100G Development Kit, Stratix V GX Edition User Guide (ver 1.1, Aug 2012, 2 MB)
- DSP Development Kit, Stratix V Edition, User Guide (ver 1.0, Jul 2012, 3 MB)
- Signal Integrity Development Kit, Stratix V GX Edition User Guide (ver 1.1, Jul 2012, 3 MB)
- Stratix V Advanced Systems Development Kit User Guide (ver 1.0, Feb 2013, 2 MB)
- Stratix V GX FPGA Development Kit User Guide (ver 1.2, Jul 2012, 3 MB)
- Transceiver Signal Integrity Development Kit, Stratix V GT Edition Reference Manual (ver 1.1, Mar 2013, 1 MB)
- Transceiver Signal Integrity Development Kit, Stratix V GT Edition User Guide (ver 1.1, Mar 2013, 3 MB)
End Applications
- 100G OTN Transponder IP Solution (ver 1.0, Jun 2012, 354 KB)
- Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs (ver 2.0, Nov 2011, 830 KB)
- Altera's 28 nm Device Portfolio (ver 2.0, Oct 2012, 1 MB)
- Altera's High-Performance Platform for Ultra HD Video Applications (ver 1.0, Sep 2012, 506 KB)
- Broadcast Design Solutions from Altera (ver 2.0, May 2013, 443 KB)

- Dual 100G OTN Transponder IP Solution (ver 1.0, Jun 2012, 280 KB)
- Enabling 100-Gbit OTN Muxponder Solutions on 28-nm FPGAs (ver 1.0, Apr 2010, 342 KB)
- Fulfilling Technology Needs for 40G–100G Network-Centric Operations and Warfare (ver 1.1, Sep 2010, 562 KB)
- Implementing Next-Generation Passive Optical Network Designs with FPGAs (ver 1.2, May 2012, 498 KB)
- Integrating 100-GbE Switching Solutions on 28-nm FPGAs (ver 1.1, Jul 2010, 623 KB)
- Multirate 100G Muxponder IP Solution (ver 1.0, Jun 2012, 286 KB)
- Optimize Motor Control Designs with an Integrated FPGA Design Flow (ver 1.2, May 2012, 811 KB)
- Radar Processing: FPGAs or GPUs? (ver 2.0, May 2013, 363 KB)

- Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach (ver 1.0, Aug 2012, 669 KB)
- Stratix V FPGAs for Next-Generation PON Designs (ver 1.1, Aug 2011, 275 KB)
- Traffic Management Solutions from Altera (ver 1.2, Feb 2012, 300 KB)
- Versatile Digital QAM Modulator (ver 2.0, Dec 2010, 553 KB)
General Device Documentation
- Altera's 28-nm, Power-Efficient Transceivers (ver 1.3, Jan 2013, 439 KB)
- AN 425: Using the Command-Line Jam STAPL Solution for Device Programming (ver 5.0, Dec 2010, 1,004 KB)
- AN 645: Dynamic Reconfiguration of PMA Controls in Stratix V Devices (ver 1.0, May 2011, 778 KB)
PMA Controls Reconfiguration Reference Design (14 MB)
- Backplane Applications with 28 nm FPGAs (ver 1.1, Dec 2012, 1 MB)
- Delivering the Right Power and Performance for 28 nm High-End FPGAs (ver 1.0, Dec 2012, 427 KB)
- Enabling High-Performance DSP Applications with Stratix V Variable-Precision DSP Blocks (ver 1.1, May 2011, 936 KB)
- Extending Transceiver Leadership at 28 nm (ver 2.1, Oct 2012, 839 KB)
- Increasing Design Functionality with Partial and Dynamic Reconfiguration in 28-nm FPGAs (ver 1.0, Jul 2010, 460 KB)
- Introducing Innovations at 28 nm to Move Beyond Moore’s Law (ver 1.2, Jun 2012, 1 MB)
- Optimize Power and Cost with Altera’s Diversified 28-nm Device Portfolio (ver 1.2, Sep 2012, 421 KB)
- Stratix V ES Errata Sheet and Guidelines (ver 1.6, Jan 2012, 906 KB)


