Literature: Stratix II Devices
The Stratix® II Device Handbook is comprised of two volumes. Volume 1 is the Stratix II FPGA family data sheet. Volume 2 provides detailed information on Stratix II features, and PCB layout guidelines. To view both volumes, click the link below.
Get more information on Stratix II Pin-Outs.
Check the Knowledge Database for Known Issues with the Stratix II Handbook.
Volume 1 (ver 4.3, May 2007, 2,986 KB)
Section I.
Stratix II Device Family Data Sheet (2,883 KB)
- Chapter 1. Introduction (ver 4.2, May 2007, 132 KB)
- Chapter 2. Stratix II Architecture (ver 4.3, May 2007, 1,010 KB)
- Chapter 3. Configuration & Testing (ver 4.2, May 2007, 165 KB)
- Chapter 4. Hot Socketing & Power-On Reset (ver 3.2, Apr 2006, 101 KB)
- Chapter 5. DC & Switching Characteristics (ver 4.3, May 2007, 1,668 KB)
- Chapter 6. Reference & Ordering Information (ver 2.1, May 2007, 70 KB)
Volume 2 (ver 4.4, Jan 2008, 4,762 KB)
Section I.
Clock Management (1,080 KB)
Section II.
Memory (700 KB)
Section III.
I/O Standards (747 KB)
Section IV.
Digital Signal Processing (DSP) (348 KB)
Section V.
Configuration and Remote System Upgrades (1,401 KB)
Section VI.
PCB Layout Guidelines (1,076 KB)
Related Documentation
Data Sheets
User Guides
- External DDR Memory PHY Interface Megafunction User Guide (ALTMEMPHY) (ver 4.1, Dec 2007, 1,787 KB)
- DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 1,972 KB)
- Double Data Rate I/O Megafunction User Guide (ALTDDIO_IN, ALTDDIO_OUT, and ALTDDIO_BIDIR) (ver 4.2, Jun 2007, 3,984 KB)
altddio_DesignExample_ex1.zip ( 111 KB)
altddio_DesignExample_ex2.zip ( 139 KB)
altddio_ex1_msim.zip ( 17 KB)
altddio_ex2_msim.zip ( 17 KB)
- First-In-First-Out Megafunction User Guide (FIFO) (ver 4.0, May 2007, 959 KB)
dcfifo_in_legacy_mode.qar ( 268 KB)
dcfifo_in_show_ahead_mode.qar ( 223 KB)
dcfifo_narrow_write_wide_read.qar ( 227 KB)
dcfifo_wide_write_narrow_read.qar ( 231 KB)
scfifo_in_legacy_mode.qar ( 36 KB)
scfifo_in_show_ahead_mode.qar ( 37 KB)
- PowerPlay Early Power Estimator User Guide for Stratix II, Stratix II GX, and HardCopy II (ver 1.2, Jan 2007, 2,797 KB)
- DSP Development Kit, Stratix II Professional Edition Getting Started User Guide (ver 1.0, Aug 2005, 966 KB)
- DSP Development Kit, Stratix II Edition Getting Started User Guide (ver 1.1, May 2005, 645 KB)
Manuals
Application Notes
- AN 326: Interfacing QDRII+ & QDRII with Stratix II, Stratix II GX, Stratix, & Stratix GX Devices (ver 5.0, Mar 2008, 2,521 KB)
- AN 432: Using Different PLL Settings Between Stratix II and HardCopy II Devices (ver 1.1, Dec 2007, 168 KB)
- AN 114: Designing with High-Density BGA Packages for Altera Devices (ver 5.1, Dec 2007, 574 KB)
- AN477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 1.0, Nov 2007, 260 KB)
- AN 328: Interfacing DDR2 SDRAM with Stratix II, Stratix II GX, and Arria GX Devices (ver 4.0, Nov 2007, 3,065 KB)
ALTMEMPHY Example ( 2,834 KB)
Legacy PHY Example ( 4,866 KB)
- AN 462: Implementing Multiple Memory Interfaces Using the ALTMEMPHY Megafunction (ver 1.1, Oct 2007, 1,377 KB)
Example Design for AN 462: top.qar ( 2,313 KB)
- AN 449: External Memory Interface Design Guidelines for Stratix II, Stratix II GX, and Arria GX Devices (ver 1.2, Sep 2007, 284 KB)
- AN 341: Using the Design Security Feature in Stratix II and Stratix II GX Devices (ver 2.1, Aug 2007, 1,156 KB)
- AN 471: High-Performance FPGA PLL Analysis with TimeQuest (ver 1.0, Jul 2007, 226 KB)
- AN 358: Thermal Management for FPGAs (ver 1.1, Feb 2007, 157 KB)
- AN 444: Dual DIMM DDR2 SDRAM Memory Interface Design Guidelines (ver 1.0, Feb 2007, 7,669 KB)
- AN 408: DDR2 Memory Interface Termination, Drive Strength and Loading Design Guidelines (ver 1.2, Feb 2007, 2,186 KB)
Simulation Example ( 2 KB)
- AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices (ver 1.3, Feb 2007, 178 KB)
- AN 366: Understanding I/O Output Timing for Altera Devices (ver 1.0, Jul 2006, 311 KB)
- AN 409: Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices (ver 1.0, Mar 2006, 244 KB)
Design Example ( 7,634 KB)
- AN 411: Understanding PLL Timing for Stratix II Devices (ver 1.0, Mar 2006, 1,103 KB)
Design Example 1 ( 279 KB)
Design Example 2 ( 232 KB)
- AN 327: Interfacing DDR SDRAM with Stratix II Devices (ver 3.0, Feb 2006, 1,231 KB)
- AN 367: Implementing PLL Reconfiguration in Stratix II Devices (ver 2.0, Dec 2005, 689 KB)
Example 1: altpll_reconfig Design with the MIF ( 243 KB)
Example 2: altpll_reconfig Design with Write Parameters ( 248 KB)
Example 3: altpll_reconfig Design for Phase Shift Stepping ( 251 KB)
- AN 325: Interfacing RLDRAM II with Stratix II, Stratix & Stratix GX Devices (ver 3.1, Nov 2005, 1,625 KB)
- AN 393: Stratix II Professional Filtering Lab (ver 1.0, Aug 2005, 1,224 KB)
- AN 394: Using SOPC Builder & DSP Builder Tool Flow (ver 1.0, Aug 2005, 909 KB)
- AN 395: Stratix II Professional FFT Co-Processor Reference Design (ver 1.0, Aug 2005, 446 KB)
- AN 384: Using Calibrated Series On-Chip Termination in Stratix II Devices (ver 1.0, Apr 2005, 116 KB)
User-Mode Calibration Reference Design (Quartus II Version 4.2 SP1) ( 233 KB)
User-Mode Calibration Reference Design (Quartus II Version 5.0) ( 232 KB)
- AN 379: Active Serial Memory Interface Controller Reference Design (ver 1.0, Mar 2005, 190 KB)
Design Files ( 10 KB)
- AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function (ver 1.1, Dec 2004, 62 KB)
- AN 306: Implementing Multipliers in FPGA Devices (ver 3.0, Jul 2004, 732 KB)
- AN 355: Stratix II Device System Power Considerations (ver 1.0, Jun 2004, 274 KB)
- AN 315: Guidelines for Designing High-Speed FPGA PCBs (ver 1.1, Feb 2004, 1,814 KB)
White Papers
- Basic Principles of Signal Integrity (ver 1.3, Dec 2007, 547 KB)
- Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform (ver 1.0, Sep 2007, 1,161 KB)
- SEmulation: Turbocharging the FPGA Development Process (ver 1.0, Mar 2007, 1,240 KB)
- Stratix II Performance and Logic Efficiency Analysis (ver 2.0, Sep 2006, 1,111 KB)
- Stratix II vs. Virtex-4 Performance Comparison (ver 2.0, Sep 2006, 505 KB)
- Stratix II DDR2 System Validation Summary (ver 1.0, May 2006, 1,103 KB)
- Architectural Differences Between Stratix II & Stratix Devices (ver 1.1, Jan 2006, 324 KB)
- Versatile Digital QAM Modulator (ver 1.1, Jan 2006, 585 KB)
- Stratix II vs. Virtex-4 Density Comparison (ver 2.2, Aug 2005, 264 KB)
- Stratix II vs. Virtex-4 Power Comparison & Estimation Accuracy (ver 1.0, Aug 2005, 355 KB)
- Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 62 KB)
- FPGAs for High-Performance DSP Applications (ver 1.1, May 2005, 118 KB)
- Using Parity to Detect Memory Errors in Stratix Devices (ver 1.2, Feb 2005, 96 KB)
- Stratix II DSP Performance (ver 2.0, Jan 2005, 240 KB)
- Stratix vs. Virtex-II Pro FPGA Performance Analysis (ver 1.1, Nov 2004, 146 KB)
- Benefits of Altera's High-Speed DDR2 SDRAM Memory Interface Solution (ver 1.0, May 2004, 273 KB)
- Implementing a Queue Manager in Traffic Management Systems (ver 1.1, Feb 2004, 124 KB)
- The Need for Dynamic Phase Alignment in High-Speed FPGAs (ver 1.1, Feb 2004, 70 KB)
- Altera Hot-Socketing & Power-Sequencing Advantages (ver 1.2, Feb 2004, 79 KB)
- MorphIO: An I/O Reconfiguration Solution for Altera Devices (ver 1.0, May 2003, 46 KB)
Tcl File ( 5 KB)
Readme File ( 6 KB) Brochures
Selector Guides
Errata Sheets
- Stratix II FPGA Family Errata Sheet (ver 2.0, Dec 2006, 228 KB)
- DSP Development Kit, Stratix II Edition Errata Sheet v1.1 (ver 1.0, Sep 2005, 97 KB)
- DSP Development Kit, Stratix II Edition Errata Sheet (ver 1.0, Apr 2005, 87 KB)
- High Speed Development Kit, Stratix II Edition Errata Sheet (ver 1.0, Apr 2005, 69 KB)
Technical Briefs
Application Briefs
Product Overview
- Altera wireless solutions - 3GPP Long-Term Evolution (ver 1.0, Jan 2008, 68 KB)
- Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 103 KB)
- Industrial Snakebytes sell sheet (ver 1.0, Apr 2007, 112 KB)
- Complete Memory Interface Design Solutions (ver 1.0, Sep 2006, 149 KB)
- Fit More in Stratix II (ver 1.0, May 2005, 102 KB)
Inserts and Advertorials
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Literature
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