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High-End and Transceiver FPGAs Documentation Updates

The table below lists the High-End and Transceiver FPGAs documentation that was updated in the past 60 days.

Title Release Date
AN 519: Stratix IV Design GuidelinesNew August 28, 2008
DSP Development Kit, Stratix III Edition Getting Started User GuideUpdated August 28, 2008
Device Datasheet (Stratix IV Handbook)Updated August 25, 2008
Stratix III Development Kit User GuideUpdated August 25, 2008
AN 435: Using DDR and DDR2 SDRAM with Stratix III and Stratix IV DevicesUpdated August 13, 2008
AN 436: Using DDR3 SDRAM with Stratix III and Stratix IV DevicesUpdated August 13, 2008
Stratix III IBIS ModelUpdated August 7, 2008
Stratix III and Stratix IV PowerPlay Early Power EstimatorUpdated August 7, 2008
Hardware/Software Co-Verification Using FPGA PlatformsNew August 6, 2008
AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III DevicesUpdated July 29, 2008
AN 357: Error Detection & Recovery Using CRC in Altera FPGA DevicesUpdated July 18, 2008
External DDR Memory PHY Interface Megafunction User Guide (ALTMEMPHY)Updated July 18, 2008
Military Benefits of the Managed Risk Process at 40 nmNew July 18, 2008
40-nm FPGAs and the Defense Electronic Design OrganizationNew July 18, 2008
DO-254 Support for FPGA Design FlowsNew July 18, 2008
Anti-Tamper Capabilities in FPGA DesignsNew July 18, 2008
Military Productivity Factors in Large FPGA DesignsNew July 18, 2008
Stratix II, Stratix II GX, and HardCopy II PowerPlay Early Power EstimatorUpdated July 18, 2008
AN 341: Using the Design Security Feature in Stratix II and Stratix II GX DevicesUpdated July 15, 2008
I/O Interfaces (Stratix III Handbook)Updated July 11, 2008
Hot Socketing, Configuration, Remote Upgrades & Testing (Stratix III Handbook)Updated July 11, 2008
Altera Product CatalogNew July 11, 2008
AN 408: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout GuidelinesUpdated July 8, 2008
Device Core (Stratix IV Handbook)Updated July 8, 2008

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